Xilinx Spartan 6 FPGA User Manual

14 www.xilinx.com Spartan-6 FPGA Power Management
UG394 (v1.1) September 4, 2012
Chapter 1: Power Management With Suspend Mode
PROGRAM_B Programming Pin Always Overrides Suspend Mode
Pulsing the PROGRAM_B programming pin Low always overrides suspend mode and
forces the FPGA to restart configuration. Power-cycling the FPGA also restarts
configuration. If the SUSPEND input remains High, the device re-enters suspend mode
after finishing configuration.
Enable the Suspend Feature and Glitch Filtering
Before it can be used, the suspend power-saving feature must first be enabled in the FPGA
bitstream. By default, the suspend feature is disabled and driving the SUSPEND pin has no
effect. The suspend feature is enabled using the user constraints file (UCF), or through a
bitstream generator (BitGen) option.
User Constraints File Enable
Suspend mode is enabled and the SUSPEND input glitch filter option is defined using a
CONFIG statement in a UCF. Table 1-1 shows the available options. This is the
recommended method for enabling suspend mode as this attribute also automatically
reserves the AWAKE pin.
Config ENABLE_SUSPEND = "FILTERED" ;
Bitstream Generator
Setting the en_suspend bitstream option is an alternate way to enable the suspend mode.
However, this method is not recommended because it does not automatically reserve the
AWAKE pin in the application.
bitgen -g en_suspend:Yes
The following option enables the glitch filter on the SUSPEND pin.
bitgen -g suspend_filter:Yes
Table 1-1: Available Options for the ENABLE_SUSPEND Attribute
Option Suspend Mode SUSPEND Pin Filter AWAKE Pin
NO Suspend mode is disabled Not applicable. Connect
SUSPEND pin to GND.
Available as a user I/O pin
in the FPGA application.
FILTERED Suspend mode is enabled Glitch filter is enabled. AWAKE status indicator.
UNFILTERED Glitch filter is bypassed.

Xilinx Spartan 6 FPGA Specifications

General

Brand	Xilinx
Model	Spartan 6 FPGA
Category	Microcontrollers
Language	English