Xilinx VCU128 - Page 52

• Four GTY transceivers allocated to FMCP_HSPC_DP[0:3]
The XCVU37P right-side GTY transceiver interface assignments are shown in the following
gure.
Figure 20: XCVU37P Right-side GTY Transceiver Assignments
BANK 135
MGTY_135_0
MGTY_135_1
MGTY_135_2
MGTY_135_3
MGTY_135_REFCLK0
MGTY_135_REFCLK1
QSFP1_TX1/RX1
QSFP1_TX2/RX2
QSFP1_TX3/RX3
QSFP1_TX4/RX4
QSFP1_SI570_CLOCK
NC
BANK 128
MGTY_128_0
MGTY_128_1
MGTY_128_2
MGTY_128_3
MGTY_128_REFCLK0
MGTY_128_REFCLK1
FMCP_HSPC_DP16
FMCP_HSPC_DP17
FMCP_HSPC_DP18
FMCP_HSPC_DP19
FMCP_HSPC_GBTCLK4_M2C
NC
BANK 134
MGTY_134_0
MGTY_134_1
MGTY_134_2
MGTY_134_3
MGTY_134_REFCLK0
MGTY_134_REFCLK1
QSFP2_TX1/RX1
QSFP2_TX2/RX2
QSFP2_TX3/RX3
QSFP2_TX4/RX4
QSFP2_SI570_CLOCK
SI5328_CLOCK1_C
BANK 127
MGTY_127_0
MGTY_127_1
MGTY_127_2
MGTY_127_3
MGTY_127_REFCLK0
MGTY_127_REFCLK1
FMCP_HSPC_DP12
FMCP_HSPC_DP13
FMCP_HSPC_DP14
FMCP_HSPC_DP15
FMCP_HSPC_GBTCLK3_M2C
NC
BANK 132
MGTY_132_0
MGTY_132_1
MGTY_132_2
MGTY_132_3
MGTY_132_REFCLK0
MGTY_132_REFCLK1
QSFP3_TX1/RX1
QSFP3_TX2/RX2
QSFP3_TX3/RX3
QSFP3_TX4/RX4
QSFP3_SI570_CLOCK
SI5328_CLOCK2_C
BANK 126
MGTY_126_0
MGTY_126_1
MGTY_126_2
MGTY_126_3
MGTY_126_REFCLK0
MGTY_126_REFCLK1
FMCP_HSPC_DP8
FMCP_HSPC_DP9
FMCP_HSPC_DP10
FMCP_HSPC_DP11
FMCP_HSPC_GBTCLK2_M2C
NC
BANK 131
MGTY_131_0
MGTY_131_1
MGTY_131_2
MGTY_131_3
MGTY_131_REFCLK0
MGTY_131_REFCLK1
QSFP4_TX1/RX1
QSFP4_TX2/RX2
QSFP4_TX3/RX3
QSFP4_TX4/RX4
QSFP4_SI570_CLOCK
SMA_REFCLK_INPUT
BANK 125
MGTY_125_0
MGTY_125_1
MGTY_125_2
MGTY_125_3
MGTY_125_REFCLK0
MGTY_125_REFCLK1
FMCP_HSPC_DP4
FMCP_HSPC_DP5
FMCP_HSPC_DP6
FMCP_HSPC_DP7
FMCP_HSPC_GBTCLK1_M2C
NC
BANK 129
MGTY_129_0
MGTY_129_1
MGTY_129_2
MGTY_129_3
MGTY_129_REFCLK0
MGTY_129_REFCLK1
FMCP_HSPC_DP20
FMCP_HSPC_DP21
FMCP_HSPC_DP22
FMCP_HSPC_DP23
FMCP_HSPC_GBTCLK5_M2C
NC
BANK 124
MGTY_124_0
MGTY_124_1
MGTY_124_2
MGTY_124_3
MGTY_124_REFCLK0
MGTY_124_REFCLK1
FMCP_HSPC_DP0
FMCP_HSPC_DP1
FMCP_HSPC_DP2
FMCP_HSPC_DP3
FMCP_HSPC_GBTCLK0_M2C
NC
X21650-092618
Right-side GTY Transceiver Connectivity
The following tables list the connecvity of the ten XCVU37P FPGA U1 right-side GTY
transceivers.
Chapter 3: Board Component Descriptions
UG1302 (v1.0) December 21, 2018 www.xilinx.com
VCU128 Board User Guide 52
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