Xilinx Virtex-7 FPGA VC7222 IBERT - Page 58

58 www.xilinx.com VC7222 IBERT Getting Started Guide
UG971 (v5.0) June 12, 2014
Chapter 3: Creating the GTZ IBERT Core
4. Back in the Manage IP window, from the Sources window, right-click the IBERT IP
and select Open IP Example Design (Figure 3-5). Specify a location to save the
design, press OK, and the design opens in a new Vivado window.
X-Ref Target - Figure 3-5
Figure 3-5: Open IP Example Design
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