Xilinx ZCU102 User Manual

ZCU102 Evaluation Board User Guide www.xilinx.com 103
UG1182 (v1.2) March 20, 2017
Chapter 3: Board Component Descriptions
See the ANSI/VITA 57.1 FPGA mezzanine card (FMC) specification [Ref 22] for additional
information on the FPGA FMC.
Table 3-53: J4 HPC1 FMC Section J and K Connections to XCZU9EG U1
J5 Pin Schematic Net Name
I/O
Standard
U1 Pin J5 Pin Schematic Net Name
I/O
Standard
U1 Pin
J2 NC K1 NC
J3 NC K4 NC
J6 NC K5 NC
J7 NC K7 NC
J9 NC K8 NC
J10 NC K10 NC
J12 NC K11 NC
J13 NC K13 NC
J15 NC K14 NC
J16 NC K16 NC
J18 NC K17 NC
J19 NC K19 NC
J21 NC K20 NC
J22 NC K22 NC
J24 NC K23 NC
J25 NC K25 NC
J27 NC K26 NC
J28 NC K28 NC
J30 NC K29 NC
J31 NC K31 NC
J33 NC K32 NC
J34 NC K34 NC
J36 NC K35 NC
J37 NC K37 NC
J39 NC K38 NC
K40 NC
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Xilinx ZCU102 Specifications

General

Processor	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
SD Card	MicroSD card slot
Video Outputs	DisplayPort
FPGA	Xilinx Zynq UltraScale+ XCZU9EG-2FFVB1156E
Memory	4GB DDR4 Component Memory
Storage	MicroSD card slot
Ethernet	Gigabit Ethernet
USB	1 x USB 3.0, 1 x USB 2.0
PCIe	PCIe Gen2 x4
Display	DisplayPort
Power Supply	12V DC input
SATA	SATA 3.0
Clocking	Programmable clocks
Operating System Support	PetaLinux