Xilinx ZCU102 User Manual

ZCU102 Evaluation Board User Guide www.xilinx.com 125
UG1182 (v1.2) March 20, 2017
Appendix B: Master Constraints File Listing
set_property PACKAGE_PIN J32 [get_ports "FMC_HPC1_DP5_C2M_N"]
set_property PACKAGE_PIN J31 [get_ports "FMC_HPC1_DP5_C2M_P"]
set_property PACKAGE_PIN K34 [get_ports "FMC_HPC1_DP5_M2C_N"]
set_property PACKAGE_PIN K33 [get_ports "FMC_HPC1_DP5_M2C_P"]
set_property PACKAGE_PIN H30 [get_ports "FMC_HPC1_DP6_C2M_N"]
set_property PACKAGE_PIN H29 [get_ports "FMC_HPC1_DP6_C2M_P"]
set_property PACKAGE_PIN H34 [get_ports "FMC_HPC1_DP6_M2C_N"]
set_property PACKAGE_PIN H33 [get_ports "FMC_HPC1_DP6_M2C_P"]
set_property PACKAGE_PIN G32 [get_ports "FMC_HPC1_DP7_C2M_N"]
set_property PACKAGE_PIN G31 [get_ports "FMC_HPC1_DP7_C2M_P"]
set_property PACKAGE_PIN F34 [get_ports "FMC_HPC1_DP7_M2C_N"]
set_property PACKAGE_PIN F33 [get_ports "FMC_HPC1_DP7_M2C_P"]
set_property PACKAGE_PIN AF5 [get_ports "FMC_HPC1_LA00_CC_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA00_CC_N"]
set_property PACKAGE_PIN AE5 [get_ports "FMC_HPC1_LA00_CC_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA00_CC_P"]
set_property PACKAGE_PIN AJ5 [get_ports "FMC_HPC1_LA01_CC_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA01_CC_N"]
set_property PACKAGE_PIN AJ6 [get_ports "FMC_HPC1_LA01_CC_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA01_CC_P"]
set_property PACKAGE_PIN AD1 [get_ports "FMC_HPC1_LA02_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA02_N"]
set_property PACKAGE_PIN AD2 [get_ports "FMC_HPC1_LA02_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA02_P"]
set_property PACKAGE_PIN AJ1 [get_ports "FMC_HPC1_LA03_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA03_N"]
set_property PACKAGE_PIN AH1 [get_ports "FMC_HPC1_LA03_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA03_P"]
set_property PACKAGE_PIN AF1 [get_ports "FMC_HPC1_LA04_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA04_N"]
set_property PACKAGE_PIN AF2 [get_ports "FMC_HPC1_LA04_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA04_P"]
set_property PACKAGE_PIN AH3 [get_ports "FMC_HPC1_LA05_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA05_N"]
set_property PACKAGE_PIN AG3 [get_ports "FMC_HPC1_LA05_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA05_P"]
set_property PACKAGE_PIN AJ2 [get_ports "FMC_HPC1_LA06_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA06_N"]
set_property PACKAGE_PIN AH2 [get_ports "FMC_HPC1_LA06_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA06_P"]
set_property PACKAGE_PIN AE4 [get_ports "FMC_HPC1_LA07_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA07_N"]
set_property PACKAGE_PIN AD4 [get_ports "FMC_HPC1_LA07_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA07_P"]
set_property PACKAGE_PIN AF3 [get_ports "FMC_HPC1_LA08_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA08_N"]
set_property PACKAGE_PIN AE3 [get_ports "FMC_HPC1_LA08_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA08_P"]
set_property PACKAGE_PIN AE1 [get_ports "FMC_HPC1_LA09_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA09_N"]
set_property PACKAGE_PIN AE2 [get_ports "FMC_HPC1_LA09_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA09_P"]
set_property PACKAGE_PIN AJ4 [get_ports "FMC_HPC1_LA10_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA10_N"]
set_property PACKAGE_PIN AH4 [get_ports "FMC_HPC1_LA10_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA10_P"]
set_property PACKAGE_PIN AF8 [get_ports "FMC_HPC1_LA11_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC1_LA11_N"]
set_property PACKAGE_PIN AE8 [get_ports "FMC_HPC1_LA11_P"]
Send Feedback

Xilinx ZCU102 Specifications

General

Processor	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
SD Card	MicroSD card slot
Video Outputs	DisplayPort
FPGA	Xilinx Zynq UltraScale+ XCZU9EG-2FFVB1156E
Memory	4GB DDR4 Component Memory
Storage	MicroSD card slot
Ethernet	Gigabit Ethernet
USB	1 x USB 3.0, 1 x USB 2.0
PCIe	PCIe Gen2 x4
Display	DisplayPort
Power Supply	12V DC input
SATA	SATA 3.0
Clocking	Programmable clocks
Operating System Support	PetaLinux