Xilinx ZCU102

ZCU102 Evaluation Board User Guide www.xilinx.com 17
UG1182 (v1.2) March 20, 2017
Chapter 2: Board Setup and Configuration
J20
Reset Sequencer PS_POR_B
• OFF: No sequencer control of PS_POR_B
• 1-2: Sequencer can control PS_POR_B
1-2 5 12
J21
Reset Sequencer PS_SRST_B
• OFF: No sequence control of PS_SRST_B
• 1-2: Sequencer can control PS_SRST_B
1-2 6 12
J22
Reset Sequencer inhibit
• OFF: Sequencer normal operation
• 1-2: Sequencer inhibit (resets will stay
asserted)
OFF 7 12
J14
ARM Debug VTREF
•Open: VTREF floating
• 1-2: VTREF = VCCOPS3 (1.8V)
1-2 8 22
J15
ARM Debug VSUPPLY
• OFF: VSUPPLY floating
• 1-2: VSUPPLY = VCCOPS3 (1.8V)
OFF 9 22
J56
VCCO_PSDDR_504 select
• 1-2: Switched DDR4 VDDQ
• 3-4: Direct DDR4 VDDQ
1-2 10 24
J159
DDR4 Reset Suspend Enable
• 1-2: Suspend disabled (Gate bypass)
• 2-3: Suspend enabled
1-2 11 24
J16 SFP0 TX: 1-2:Disable; OFF: Enable OFF 12 34
J17 SFP1 TX: 1-2:Disable; OFF: Enable OFF 12 34
J42 SFP2 TX: 1-2:Disable; OFF: Enable OFF 14 34
J54 SFP3 TX: 1-2:Disable; OFF: Enable OFF 15 34
J162
PCIe PRSNT select
•1-2: x1
•3-4: x4
•5-6: GND (not used)
5-6 16 43
J110
USB ULPI CVBUS Select
•1-2: DEVICE or OTG Mode
• 2-3: Host Mode
1-2 17 51
J109
USB ULPI ID select
• 1-2: Connector ID
• 2-3: VDD33 ID
2-3 18 51
J112
USB ULPI Shield GND select
•1-2: Capacitor
•2-3: GND
1-2 19 51
Table 2-3: Default Jumper Settings (Cont’d)
Jumper Function Default
Figure 2-2
Callout
Schematic
Page
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