Xilinx Zynq UltraScale+ ZCU208 - Table of Contents

Table of Contents
Revision History...............................................................................................................2
Chapter 1: Introduction.............................................................................................. 5
Overview.......................................................................................................................................5
Document Audience and Scope................................................................................................ 5
Additional Resources.................................................................................................................. 5
Block Diagram..............................................................................................................................6
Board Features............................................................................................................................ 6
Board Specifications................................................................................................................. 10
Chapter 2: Board Setup and Configuration....................................................11
Standard ESD Measures........................................................................................................... 11
Board Component Location.....................................................................................................11
Default Jumper and Switch Settings....................................................................................... 15
Zynq UltraScale+ RFSoC XCZU48DR........................................................................................ 19
Chapter 3: Board Component Descriptions................................................... 21
Overview.....................................................................................................................................21
Component Descriptions......................................................................................................... 21
Appendix A: VITA57.4 FMCP Connector Pinout............................................ 65
Appendix B: Xilinx Design Constraints............................................................. 66
Overview.....................................................................................................................................66
Appendix C: HW-XM650/655 Balun Daughter Cards for Gen 3
RFSoC EVM.................................................................................................................... 67
Overview.....................................................................................................................................67
Block Diagram........................................................................................................................... 68
Connector...................................................................................................................................69
XM650/655 Connector Pinout..................................................................................................70
CoreHC2 Connector Pin Out (XM655 Only)............................................................................74
Features......................................................................................................................................75
UG1410 (v1.0) July 8, 2020 www.xilinx.com
ZCU208 Board User Guide 3
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