MOUNTING AND WIRING 4-31
SB1391 Hardware and Setup Guide - Document revision no. 1.14
4.4.6. HSSI + PEG Connector (J5)
The optional HSSI + PEG connector is D type, 15 pin, male
The PEG option must be specified in the product order.
Maximum PEG delay<0.2µsec
Minimum Pulse width>100nsec
The high-speed serial interface (HSSI) can serve as a general purpose means for adding external
extensions. These can include: SSI-type encoder; another A to D converter, temperature sensor,
etc.
All the HSSI signals are differential, non-isolated.
Warning
To enable maximum speed, the PEG outputs are not isolated from the 5V logic
supply.
Note
Physically the PEG outputs and the corresponding digital outputs have the
same source but different output levels. The PEG connector outputs are
differential with respect to digital ground (DGND) whereas the equivalent
digital outputs are isolated with respect to the I/O return (V_RETURN).
Further information
More detailed information about the PEG function is contained in
Chapter 7, "HARDWARE INTERFACE PARAMETERS," and in the
ACS Software Guide.
TABLE 4-22 HSSI + PEG connection pins
Pin Name Description
1. S_CNV+ HSSI start convert (read) output (noninverted)
2. S_CLK1+ HSSI clock output 1 (noninverted)
3. S_DATA1+ HSSI data input 1 (noninverted)
4. X_STA+ X status output (noninverted)
5. NC Not connected
6. X_PEG+ X PEG output (noninverted)
7. NC Not connected
8. DGND Return +5V
9. S_CNV- HSSI start convert (read) output (inverted)
10. S_CLK1- HSSI clock output 1 (inverted)
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