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Agilent Technologies 33500 Series - Page 136

Agilent Technologies 33500 Series
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136
Chapter 5 Block Diagram
Block Diagram
5
Waveform
DAC
Elliptical Filter
Sync
DAC
-7.96 dB
-15.91 dB
-23.87 dB
Offset
DAC
Output
Amp
Processor
Chan Out
Sync Out
Processor
Keyboard
Knob
DisplayUSB
GPIB
LAN
USB
RAM
ROM
Ref Out
Ref In
FPGA CLK
WDAC1 CLK
WDAC2 CLK
Clock
Generator
MOD In
FPGA
ARB1
SDRAM
ARB2
SDRAM
Trig
-23.87 dB
Output
Relay
Meas
Over Voltage
Over Current
protect
Front Panel
Processor Board
Main Board
WDAC1 CLK
ADC
Channel 2
Offset DAC
FPGA

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