Alinco DR-435 - DR-235 PLL Synthesizer Circuit

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2. Power Amplifier Circuit
The transmitted signal is oscillated by the VCO, amplified by the drive amplifier
(IC112) and younger amplifier (Q115), and input to the final power module
(IC110). The signal is then amplified by the final power module (IC110) and led
to the antenna switch (D110) and low-pass filter (L113, L114, L115, L116,
C215, C216, C202, C203 and C204), where unwanted high harmonic waves
are reduced as needed, and the resulting signal is supplied to the antenna.
3. APC Circuit
Part of the transmission power from the low-pass filter is detected by D111
and D112, converted to DC. The detection voltage is passed through the
APC circuit (Q118, Q117, Q116), then it controls the APC voltage supplied to
the younger amplifier Q115 and the final power module IC110 to fix the
transmission power.
6) PLL Synthesizer Circuit (DR-235)
1. PLL
The dividing ratio is obtained by sending data from the CPU (IC1) to pin 2 and
sending clock pulses to pin 3 of the PLL IC (IC501). The oscillated signal from
the VCO is amplified by the buffer (Q504 and Q501) and input to pin 15 of
IC501. Each programmable divider in IC501 divides the frequency of the input
signal by N according to the frequency data, to generate a comparison frequency of
5 or 6.25 kHz.
2. Reference Frequency Circuit
The reference frequency appropriate for the channel steps is obtained by
dividing the 12.8 MHz reference oscillation (X103) by 2560 or 2048, according
to the data from the CPU (IC1). When the resulting frequency is 5 kHz, channel
steps of 5, 10, 15, 20, 25, 30, and 50 kHz are used. When it is 6.25 kHz, the
12.5 kHz channel step is used.
3. Phase Comparator Circuit
The PLL (IC501) uses the reference frequency, 5 or 6.25kHz. The phase
comparator in the IC501 compares the phase of the frequency from the VCO
with that of the comparison frequency, 5 or 6.25kHz, which is obtained by the
internal divider in IC501.
4. PLL Loop Filter Circuit
If a phase difference is found in the phase comparison between the reference
frequency and VCO output frequency, the charge pump output (pin 13) of IC501
generates a pulse signal, which is converted to DC voltage by the PLL loop
filter and input to the varicap of the VCO unit for oscillation frequency control.