Alinx AX7021 - JTAG Interface

ZYNQ FPGA Development Board AX7021 User Manual
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Pin Assignment:
Signal Name
Pin Name
Pin Number
Explain
SD_CLK
PS_MIO40
E14
SD clock signal
SD_CMD
PS_MIO41
C8
SD command signal
SD_D0
PS_MIO42
D8
SD data0
SD_D1
PS_MIO43
B11
SD data1
SD_D2
PS_MIO44
E13
SD data2
SD_D3
PS_MIO45
B9
SD data3
SD_CD
PS_MIO10
G7
SD card insert signal
3.7 JTAG Interface
JTAG's download debug circuitry has been integrated on the AX7021
carrier board, so users do not need to purchase an additional Xilinx downloader.
As long as a USB cable can be used for ZYNQ development and debug. The
USB of PC and ZYNQ JTAG debug signals TCK, TDO, TMS, TDI are used for
data communication via the FTDI USB bridge chip FT232HL on the
development board. On the AX7021 development board, the JTAG interface is
in the USB interface mode. Users can connect the PC and JTAG interface to
the ZYNQ system debugging through the USB cable provided by us.
Figure 3-7-1: JTAG interface part of the schematic