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Altera Nios - Restoring the Default Reference Design

Altera Nios
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10 Altera Corporation
Board Components Nios Development Board Reference Manual, Cyclone Edition
The default reference design provides facilities to download new, user-
defined software and hardware configuration data to the board from a
host computer. Download methods include a serial cable, a JTAG
download cable, or an Ethernet cable. The GERMS monitor, an Altera-
provided monitor program for the Nios processor, is running on the
Console RS-232 serial port (J19). Simultaneously, a web server program is
running via the ethernet connection.
1 The Ethernet port provides a very fast and easy method to
download hardware and software images to the board via a web
browser on your host computer. For instructions on
communicating with your Nios development board via
Ethernet, see “Appendix C: Board Ethernet Connection” on
page 45.
f
See the Nios Development Kit, Cyclone Edition Getting Started User Guide for
instructions on setting up the Nios development board. See the Nios
Hardware Development Tutorial for instructions on using this pre-loaded
reference design.
Restoring the Default Reference Design to the Board
In the course of development, you may overwrite or erase the flash
memory space containing the default reference design. Altera provides
the flash image for the default reference design, so that you can always
return the board to its default state. These default reference files are
located in the Nios development kit examples directory.
See “Appendix B: Restore the Factory Configuration” on page 43 for more
information.

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