28 Altera Corporation
Board Components Nios Development Board Reference Manual, Cyclone Edition
Configuration
Controller
Device
(EPM7128AE)
The configuration controller (U3), is an Altera EPM7128AE device. It
comes pre-programmed with logic for managing board reset conditions
and configuring the Cyclone device from data stored in flash memory and
the EPCS4 serial configuration device.
Reset Distribution
The EPM7128AE takes a power-on reset pulse from the Linear
Technologies 1326 power-sense/reset-generator chip and distributes it
(through internal logic) to other reset-pins on the board, including the:
■ LAN91C111 (Ethernet MAC/PHY) reset
■ Flash memory reset
■ Reset signals delivered to the expansion prototype connector headers
(PROTO1 & PROTO2)
Starting Configuration
There are four methods to start a configuration sequence. The four
methods are the following:
1. Board power-on.
2. Pressing the Reset, Config button (SW10).
3. Asserting (driving 0 volts on) the MAX's reconfigreq_n input pin
(from a Cyclone design).
4. Pressing the Force Safe button (SW9).
Cyclone Configuration
At power-up or reset, the configuration controller attempts to configure
the Cyclone device with data from one of three sources, in the following
order:
■ First—The EPCS4 serial configuration device
■ Second—The User configuration from flash memory
■ Third—The Safe configuration from flash memory
First, the configuration controller puts the Cyclone FPGA in active serial
(AS) configuration mode. The Cyclone FPGA will then attempt to read
configuration data from the EPCS4. If the Cyclone FPGA is successfully
configured, the configuration controller stops.
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