16 Altera Corporation
Board Components Nios Development Board Reference Manual, Cyclone Edition
f
See www.molex.com for more compact flash connector (CON3)
information. See www.compactflash.org for more information on the
compact flash connector.
SDRAM Device
The SDRAM device (U57) is a Micron MT48LC4M32B2 chip with PC100
functionality and self refresh mode. The SDRAM is fully synchronous
with all signals registered on the positive edge of the system clock (clk).
The SDRAM device pins are connected to the Cyclone device (see Table 6).
An SDRAM controller peripheral is included with the Nios development
kit, allowing a Nios processor to view the SDRAM device as a large,
linearly addressable memory.
G20 35 -IOWR
V18 36 -WE
G17 37 RDY/BSY
VCC 38 VCC
GND 39 -CSEL
NC 40 -VS2
RESET_n 41 RESET
G14 42 -WAIT
V19 43 -INPACK
U20 44 -REG
J16 45 BVD2
J19 46 BVD1
C19 47 D081
D19 48 D091
D20 49 D101
GND 50 GND
Table 5. Compact Flash (CON3) Pin Table (Part 2 of 2)
Cyclone Device
Pin (U60)
Compact Flash Pin
(CON3)
Compact Flash Function
Table 6. SDRAM (U57) Pin Table (Part 1 of 3)
Pin Name Pin Number Connects to Cyclone Pin
A0 25 M2
A1 26 M1
A2 27 M6
A3 60 M4
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