Altera Nios - Configuration Data

Altera Corporation 29
Nios Development Board Reference Manual, Cyclone Edition Board Components
If configuration from the EPCS4 was not successful, the configuration
controller puts the Cyclone FPGA into passive serial mode and attempts
to load the user configuration from flash memory. If this also fails, the
configuration controller attempts to load the safe configuration in flash
memory.
When SW9 (Force Safe) is pressed, the configuration controller
immediately begins configuring the Cyclone FPGA from the safe
configuration in flash memory—data in the EPCS4 and in the User
Hardware Image are ignored.
Most users will never need to re-program the configuration controller.
Reprogramming the configuration controller may result in an inoperable
development board. A programming file (config_controller.pof) with the
original configuration controller logic is included with the Nios
development kit. If you have changed the MAX device logic, you can
restore the factory configuration using this programming file located in
the EPM7128_flash_config_ controller folder of the examples directory
for this board.
See the MAX7000 device literature at www.altera.com/literature/lit-
m7k.html for detailed information about the Altera EPM7128AE device
(Altera MAX
®
7000 family).
Configuration Data
The Quartus II software can (optionally) produce hexout configuration
files that are directly suitable for download and storage in the flash
memory as configuration data. A hexout configuration file for the Cyclone
EP1C20 device (U60) is a little less than 1 Mbyte, and occupies about one
eighth of the flash memory (U5).
New hexout files can be stored in the flash memory (U5) by software
running on a Nios embedded processor. The Nios pre-loaded reference
design includes facilities for downloading hexout files from a host (such
as desktop workstation) into flash memory.
f
See the Nios Embedded Processor Software Development Reference Manual for
detailed information.