AMD VCU118 - User Pmod GPIO Headers

VCU118 Board User Guide 90
UG1224 (v1.5) March 15, 2023
Chapter3: Board Component Descriptions
User Pmod GPIO Headers
[Figure 2-1, callout 29]
The VCU118 evaluation board supports two Pmod GPIO headers J52 and J53. The Pmod
nets connected to these headers are accessed using level shifters U41 (PMOD0 J52) and U42
(PMOD1 J53). The level shifters are wired to XCVU9P FPGA U1 banks 47 and 67. The VCU118
complies to PMOD Spec Version 1.2. You must add pull-up to PMOD module for both
LVCMOS, LVTTL and I2C.
Figure 3-23 shows the GPIO Pmod headers J52 (female right-angle) and J53 (male vertical).
X-Ref Target - Figure 3-23
Figure3‐23: Pmod Connectors J52 and J53 with Level Shifters U41 and U42
X17988-102616
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