Chapter 3 - CPU setup
15
In particular, the range of registers available as retentive are:
Modbus Slave 1
: %MW1128.0... %MW9320.0
Modbus Slave 2
: %MW10128.0... %MW18320.0
Marker Area
: %MB22000.0... %MB38363.0
Figure 3.10 - Percentage retentive areas
In the boot-up configuration session, by a specific dedicated menu, it is possibile
to define the number of registers, for each areas, to be used as retentive.
From the main menu select “
CPU setup
” -> “
Retain Config
”.
From the “
Retain Config
” menu it is possible to specify the split point between the
retentive and the standard memory location.
Note: In case the ENTIRE
memory will be defined as retentive, the cycle time of the
application will be increased of around 12 ms.
In case of a “
Cold start
” command: the standard retentive variables will be reset or
will assume the initialization value whereas the percentage retentive variables will
be reset. In case of CRC error, the 2 areas are separately reset or initialized.
In case of a “
Warm Start
” command: both the standard and percentage retentive
variables will be unaffected. In case of file corruption, the percentage retentive
variables will be reset.
In case of a “
Hot start
” command: both the standard and percentage retentive var-
iables will be unaffected.
At the moment it is possibile to upload or download both the retentive memory
areas, for the standard and percentage variables, using a TFTP session. The
timeframe window to perform this operation is available only during the boot-up
phase before the configuration access. To upload or download the retentive mem-
ory files, please follow the procedure described at paragraph: “TFTP Protocol
Access” on page 33
in chaper 6 paragraph6.1 The name of the files are:
Retentive standard :
/fs2/retain
Retentive percentage:
/fs2/perc_ret
Publishing
I/O configura-
tion data,
Battery
and Retain
Memory status
During 1131 program execution is possible to recall some information present in
certain particular addresses of the percentage memory. In particular:
%M0.0
: Battery satus (
1
low,
0
ok);
%M0.1
: Classic retain memory status at startup (
1
corrupted,
0
ok)
%M0.2
: Percentage retain memory status at startup (
1
corrupted,
0
ok).
The battery status is runtime calculated and updated at the beginning of each
cycle. The remaining two flags are released at startup and the value remains
unchanged after a warm or a cold startup.
The configuration of all the analogue I/O present in the CPU module are mapped,
in byte, at addresses %MB10.0... MB21.0. Each byte represents a channel.
In particular:
%MB10.0... %MB15.0
: 6 AI HL (always present);
%MB16.0... %MB19.0
:4 AO (present/or absent in couples)
%MB20.0... % MB21.0
: 2 additional UL or HL optional channels
Slave 1
4096
registers
Slave 2
4096
registers
Marker
16364
bytes