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Avnet SMARC MSC SM2S-IMX8MINI User Manual

Avnet SMARC MSC SM2S-IMX8MINI
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User Manual
4 Module Connector Signal Description
In the following tables signals are marked with the power rail associated
with the pin, and for input and I/O pins, with the input voltage tolerance.
The pin power rail and the pin input voltage tolerance may be different.
Output pins are also classified as push pull (PP) or open drain (OD).
The column “PU/PD” describes pull-up resistors (PU) or pull-down
resistors (PD) implemented on the module.
4.1 I²S
The module provides two I²S Links for connecting I²S codecs on the carrier board. Driver support for I²S is only available for Linux.
Some features:
Programmable data interface modes such as I2S, LSB or MSB-justified
Programmable word length (16, 20, 24 or 28bits)
AC97 and TDM support
Time Slot Mask Registers for reduced ARM platform overhead (for both Transmit and Receive)
128-word Transmit FIFO and 128-word Receive FIFO
Table 6: I²S Signal Description
Signal
Pin Type
Signal Level
Pin on
i.MX8M Mini
Pin name on
i.MX8M Mini
Power
Tolerance
PU/PD
Description
I2S0_LRCK
O PP
1.8V CMOS
AC14
SAI5_RXD1
1.8V
Sample-synchronization signal to the codec(s).
I2S0_CK
O PP
1.8V CMOS
AD13
SAI5_RXD2
1.8V
Serial data clock
I2S0_SDOUT
O PP
1.8V CMOS
AC13
SAI5_RXD3
1.8V
Serial TDM data output to the codec.
I2S0_SDIN
I
1.8V CMOS
AD18
SAI5_RXD0
1.8V
Serial TDM data inputs from the codec.
I2S2_LRCK
O PP
1.8V CMOS
AB19
SAI1_TXFS
1.8V
Sample-synchronization signal to the codec(s).
I2S2_CK
O PP
1.8V CMOS
AC18
SAI1_TXC
1.8V
Serial data clock
I2S2_SDOUT
O PP
1.8V CMOS
AG20
SAI1_TXD0
1.8V
Serial TDM data output to the codec.
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Avnet SMARC MSC SM2S-IMX8MINI Specifications

General IconGeneral
ProcessorNXP i.MX 8M Mini
CPU SpeedUp to 1.8 GHz
GPUGC7000Lite
RAMUp to 4 GB LPDDR4
ConnectivityWi-Fi, Bluetooth
EthernetGigabit Ethernet
USBUSB 2.0, USB 3.0
Operating SystemLinux, Android
Operating Temperature-40°C to +85°C
Form FactorSMARC 2.0
CPU ArchitectureARM Cortex-A53
StorageeMMC, SD card
Display InterfaceHDMI, MIPI DSI
Camera InterfaceMIPI CSI

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