Caen DT5740 - Trigger Management; Fig. 3.5: Block Diagram of Trigger Management

Document type:
Title:
Revision date:
Revision:
User's Manual (MUT)
Mod. DT5740 32 Channel 12bit - 65MS/s Digitizer
04/05/2016
12
NPO:
Filename:
Number of pages:
Page:
00100/09:5740x.MUTx/12
DT5740_REV12.DOC
50
29
3.4 Trigger Management
According to the default firmware operating, all the channels in a board share the same trigger
(board common trigger), so they acquire an event simultaneously and in the same way (a
determined number of samples according to buffer organization and custom size settings, and
position with respect to the trigger given by the post-trigger).
NOTE: For the trigger management in the DPP-QDC firmware operating, please refer to the web
available UM4874 - DPP-QDC User Manual.
The generation of a common acquisition trigger is based on different trigger sources
(configurable at register address 0x810C):
• Software trigger
• External trigger
• Self-trigger
• Coincidence
TRG IN
Enable Mask
x4
COMMON TRIGGER
SW TRG
GPO
(TRG OUT)
TRG_REQ[3:0]
D Q
SCLK
Acquisition
Logic
Memory
Buffers
Digital
Thresholds
4
Local Bus
Interface
Mother Board
Mezzanine
4
ADC
x4
ADC
CH0
CH7
4
4
Fig. 3.5: Block diagram of trigger management