Caen DT5740 - Fig. 4.1: Block Diagram of the Software Layers

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User's Manual (MUT)

Mod. DT5740 32 Channel 12bit - 65MS/s Digitizer

04/05/2016

NPO:

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00100/09:5740x.MUTx/12

DT5740_REV12.DOC

CAENComm (and so the CAENDigitizer) supports the following communication channels:

PC → USB → DT5740

PC → PCI/PCIe (A2818/A3818) → CONET → DT5740

CONET

(

Optical Link

)

A2818 A3818

CAEN SW Tools

USB 2.0

User’s own SW

DT5730

CAENComm

CAENDigitizer Library

A2818 driver A3818 driver

USB driver

PCI

PCIe

Fig. 4.1: Block diagram of the software layers

Main Page

Table of Contents3
List of Figures5
List of Tables5
Introduction6
Overview6
Table 1.1: Available Items7
Block Diagram8
Fig. 1.1: Mod. DT5740 Block Diagram8
Technical Specifications9
Packaging and Compliancy9
Power Requirements9
Fig. 2.1: AC/DC Power Supply Provided with the Module9
Cooling Management10
Front and Back Panel11
Fig. 2.2: Mod. DT5740 Front Panel11
Fig. 2.3: Mod. DT5740 Back Panel11
External Connectors12
ANALOG INPUT Connectors12
Fig. 2.4: ERNI SMC Connectors12
Fig. 2.5: Flat Cable Pug for ERNI to MCX Input Channels12
Fig. 2.6: A746E Plug to Adapt from ERNI to LEMO Input Channels12
CONTROL Connectors13
Fig. 2.7: MCX Connector13
ADC REFERENCE CLOCK Connectors14
OPTICAL LINK Connector14
USB Port14
Fig. 2.8: AMP CLK in Connector14
Fig. 2.9: LC Optical Connector14
DC Input15
SPARE Link15
Other Front Panel Components15
Diagnostic Leds15
Table 2.2: Front Panel Leds15
Technical Specifications Table16
Table 2.3: Mod. DT5740 Technical Specifications16
Functional Description18
Analog Input18
DC Offset Common Setting18
DC Offset Individual Setting18
Fig. 3.1: Input Diagram18
Clock Distribution19
Fig. 3.2: Clock Distribution Diagram19
PLL Mode20
Reducing the Sampling Frequency21
Decimation21
Trigger Clock21
Acquisition Modes22
Acquisition Run/Stop22
Acquisition Triggering: Samples and Events22
Fig. 3.3: Trigger Overlap23
Multi-Event Memory Organization24
Custom Size Events24
Table 3.1: Buffer Organization24
Event Structure25
Header25
Table 3.2: Pattern Configuration Table25
Data26
Event Format Examples27
Fig. 3.4: Event Organization27
Acquisition Synchronization28
Trigger Management29
Fig. 3.5: Block Diagram of Trigger Management29
Software Trigger30
External Trigger30
Self-Trigger30
Fig. 3.6: Self-Trigger Generation30
Trigger Coincidence Level31
Fig . 3.8: Trigger Requests Relationship with Majority Level32
And Ttvaw32
Fig . 3.9: Trigger Requests Relationship with Majority Level33
And Ttvaw33
Trigger Distribution34
Fig. 3.10: Trigger Configuration on GPO Front Panel Output Connector34
Example35
Reset, Clear and Default Configuration36
Global Reset36
Memory Reset36
Timer Reset36
Data Transfer Capabilities37
Block Transfer37
Single Data Transfer37
Optical Link and Usb Access38
USB Acces38
Drivers & Libraries39
Drivers39
Libraries39
Fig. 4.1: Block Diagram of the Software Layers40
Software Tools41
Caenu41
Fig. 5.1: Caenupgrader Graphical User Interface41
Caencomm Demo42
Fig. 5.2: Caencomm Demo Java and Labview Graphical Interface42
CAEN Wavedump43
Fig. 5.3: CAEN Wavedump43
Dpp-Qdc Demo Software44
Hw Installation45
Power-On Sequence45
Power-On Status45
Fig. 6.1: Front Panel Leds Status at Power-On45
Firmware and Upgrades46
Default Firmware Upgrade47
Default Firmware File Description47
Dpp Firmware Upgrade48
DPP Firmware File Description48
Troubleshooting49
PCB Revision 049
Technical Support50
Returns and Repairs50
Technical Support Service50

Caen DT5740 - Fig. 4.1: Block Diagram of the Software Layers

Table of Contents

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