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CET PMC-53 Series User Manual

CET PMC-53 Series
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Ceiec Electric Technology
44
Sliding
Windows
#
41225
Reserved
41226
WO
Clear Peak
Demands
#
UINT16
Writing ”0xFF00” to the
register resets the Peak
Demand to “0”
#
Available in Firmware Version V1.20.01 and Protocol Version V6.0 or later
*Default
Table5-7 Setup Parameters
Notes:
1) Registers 41000-41002, 41004 and 41006 are valid only if the meter is equipped with the I
residual Input. Otherwise, they are reserved.
2) Registers 41003, 41005 and 41006 are valid only if the meter is equipped with the
Temperature Input. Otherwise, they are reserved.
3) The bitmap definition of the Alarm Enable register is shown in the following table. For Bits
0 to 4, the value “1” means that the specified function is enabled; otherwise, it is disabled.
Bits 5 to 15 are reserved.
Bit
4
3
2
1
0
Function
Temperature
ALARM DO1
Trigger
I residual
ALARM DO1
Trigger
Temperature
ALARM Enable
I residual
TRIP Enable
I residual
ALARM Enable
Table 5-8 Alarm Enable Register Bitmap Definition (41006)
4) PT Ratio × CT Ratio × Rated Phase Voltage Input × Rated Current Input x 3 must be less
than 790,000,000.
5) Setpoint Data Structure
Offset
Format
Description
+0
(low-order)
UINT16
Over Setpoint
Under Setpoint
1=VLN, 2=VLL, 3=I, 4=∑P, 5=∑Q
6=VLN, 7=VLL, 8=∑PF
+0
(high-order)
Setpoint Trigger: 0= No Trigger, 1=Trigger DO1, 2=Trigger DO2
+1
UINT32
Setpoint Limit
+3
UINT16
Setpoint Delay: 0 to 9999 (seconds)
Table 5-9 Setpoint Data Structure
The Setpoint Limit for PF is 1000 times the actual PF value. For example, if the actual desired limit is
0.866, the Setpoint Limit should be specified as 866.
5.6 SOE Log
Each SOE event occupies 7 registers as shown in the following table. The SOE LOG Data Structure is
described in Table 5-11.

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CET PMC-53 Series Specifications

General IconGeneral
BrandCET
ModelPMC-53 Series
CategoryMeasuring Instruments
LanguageEnglish

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