Clevo D400E User Manual

Schematic Diagrams
Clock Generator (71-M4000-D03) B - 5
B.Schematic Diagrams
Clock Generator
Sheet 4 of 41
Clock Generator
VTT
+2.5VS
+3VS
+3VS+3VS
+3VS
+3VS
+2.5VS
+3VS
+3VS
+3VS
+2.5V
+1.8VS
AGPCLK 5
HCLK-650 5
ZCLK0 9
REFCLK1 15
PCICLKPCM 19
HCLK-CPU# 3
SDCLK 6
HCLK-CPU 3
CLKAPIC 15
REFCLK0 9
HCLK-650# 5
ZCLK1 13
PCICLKIO 22
FWDSDCLKO6
PCICLK961 13
PCICLKH8 24
PCICLKLAN 25
BSEL0 3
BSEL1 3
CPUSTP#15,29
SIO48M 22
UCLK48M 16
PCLK_80P 20
DDRCLK37
DDRCLK57
DDRCLK#37
DDRCLK#57
DDRCLK07
DDRCLK#07
DDRCLK#27
DDRCLK27
DDRCLK47
DDRCLK#47
DDRCLK17
DDRCLK#17
AGPCLKATI 30
SMBCLK 7,15
SMBDAT 7,15
HCLK-CPU
HCLK-CPU#
HCLK-650
HCLK-650#
SDCLK
AGPCLK
ZCLK0
UCLK48M
FB_IN
FS3
FS2
FS0
FS1
MULTISEL
FS4
DDRCLK3
DDRCLK5
DDRCLK#3
DDRCLK#5
FB_IN
BUF_2.5VS
FB_OUT
FB_IN
BUFFERVCC
FWDSDCLKO
SMBCLK
SMBDAT
REFCLK0
REFCLK1
CLKAPIC
HCLK-CPU
HCLK-CPU#
HCLK-650
HCLK-650#
AGPCLK
AGPCLKATI
ZCLK0
ZCLK1
PCICLK961
PCICLK1394
PCICLKH8
SDCLK
PCICLKIO
PCICLKLAN
PCICLK961
PCICLK1394
PCICLKPCM
PCICLKH8
PCICLKIO
PCICLKLAN
ZCLK1
FS0
FS1
AGP-1
CPU-3
SD-1
CPU-2
CPU-4
FS2
FS3
AGP-2
MULTISEL
FS4
CLK_VCC3
PCI-4
USB-1
PCI-2
CPU-1
PCI-3
ZIP-1
ZIP-2
PCICLKPCMPCI-1
UCLK48M
SIO48M
PCI-5
PCI-6
PCLK_80P
DDRCLK0
DDRCLK#0
DDRCLK#2
DDRCLK2
DDRCLK4
DDRCLK#4
DDRCLK1
DDRCLK#1
AGPCLKATI
SMBDAT
SMBCLK
Y5
14.318MHz
1 2
R309 22
R333 33
R334 22
R339 33
R60 4.7K(R)
R43
10K
C82
0.01UF
R337 33
D10
1SS355
AC
R37
10K
R311 22
U28
CLOCK GEN (650)
1
3
2
6 7
14
16
17
20
21
22
30
31
27
26
34
35
44
40
36
37
47
39
43
23
4
9
10
15
38
5
8
18
24
25
32
41
11
13
19
28
29
42
48
46
12
45
33
VDDREF
REF1/FS1
REF0/FS0
XIN XOUT
PCICLK_F0/FS3
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
AGPCLK1
AGPCLK0
48M
24_48M/MULTISEL
SDATA
SCLK
CPUCLK1
CPUCLK0
VDDA
VSSA
SDCLK
CPUCLK#0
CPUCLK#1
PCICLK5
REF2/FS2
ZCLK0
ZCLK1
PCICLK_F1/FS4
IREF
VSSREF
VSSZ
VSSPCI
VSSPCI
VSS48
VSSAGP
VSSCPU
VDDZ
VDDPCI
VDDPCI
VDD48
VDDAGP
VDDCPU
VDDSD
VSSSD
PCI_STOP#
CPU_STOP#
PD#/VTT_PWRGD
R310
22
R338 33
R335 22
L33
FCM2012V121
1 2
R336
33
C116 10PF(R)
L21
FCM1608K121
1 2
R33
49.9_1%
R45
475_1%
R384
22
R313
22
C76
0.1UF
R44
0(R)
T
L84
FCM2012V121
1 2
R34
49.9_1%
L94
FCM1608K121
1 2
R342 33
T
C121 10PF(R)
RP75 4P2R-0
1
23
4
C532
0.1UF
R36
49.9_1%
C92
10PF
T
R35
49.9_1%
C91
10PF
RP62 4P2R-01
2 3
4
C74
10PF(R)
C78
0.01UF
R340 33
RP76 4P2R-01
23
4
C86
0.1UF
R341 33
T
Q20
2N3904
B
E
C
C533 10PF(R)
RP61 4P2R-0
1
2 3
4
C77
10UF/10V
R283
4.7K
U29
CLOCK BUFFER (DDR48)
22
8
9
20
18
6
11
15
28
19
21
1
5
14
16
25
27
2
4
13
17
24
26
3
12
7
23
10
SDATA
CLK_IN
NC
FB_IN
NC
GND
GND
GND
GND
FB_OUT
NC
CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
VDD
VDD
SCLK
VDD
AVDD
C119
10PF(R)
R296
4.7K
C560
10U(0805)
R66 4.7K
C75
10PF(R)
C208
10U(0805)
C550
0.1UF
R67 4.7K
T
C207
0.1UF
C549
0.01UF
R61 4.7K(R)
RP77 4P2R-0
1
2 3
4
C90
0.1UF
C523
10U(0805)
C565
0.01UF
R65 4.7K(R)
C557
0.1UF
RP60 4P2R-0
1
2 3
4
C115 10PF(R)
RP43
4P2R-33
1
2 3
4
C688
10PF(R)
C118 10PF(R)
C556
0.1UF
RP44
4P2R-33
1
2 3
4
C684
0.1UF
C73 10PF(R)
C114
10PF(R)
C117 10PF(R)
C401
10UF/10V
C105
0.1UF
C120 10PF(R)
C102
0.1UF
R59
10K
C103
0.1UF
R332 33
C104
0.1UF
Q19
2N3904
B
E
C
C85
0.1UF
C84
0.1UF
R331
33
C81
0.1UF
R62
10K
R312
22
C83
0.1UF
Main Clock Generator
By-Pass Capacitors
Place near to the Clock
Outputs
Clock Outputs
Damping Resistors
Place near to the
Clock Buffer (DDR)
By-Pass Capacitors
Place near to the Clock Buffer
Frequency
Selection
L L
H L
BSEL1 BSEL0 Function
H H
L H
ICS 93722
CY 28342
ICS 952001
14.381MHZ
48 MHZ
NEAR DDR SODIMM
PLEASE PLACE IN COMP SIDE
AND NEAR TOGETHER
FS4 FS3 FS2 FS1 FS0
0 0 0 1 1
CPU SDRAM ZCLK AGP PCI
100M 133M 66M 66M 33M
0 0 0 0 1 100M 100M 66M 66M 33M
CY28352

Clevo D400E Specifications

General

Brand	Clevo
Model	D400E
Category	Laptop
Language	English