5. CPU Board Resources
PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV
37
Table 5.6. PCI Interrupt Routing Map
PIIX4E
PIRQ
signal l
1st PCI
Slot
2nd PCI
Slot
3rd PCI
Slot
4th PCI
Slot
PCI
Audio
A. G. P.
Slot
USB
Power
Manage-
ment
PIRQA INTA INTD INTC INTB INTA INTA
PIRQB INTB INTA INTD INTC INTB
PIRQC INTC INTB INTA INTD INTA
PIRQD INTD INTC INTB INTA INTA
For example, if an add-in board with a single interrupt (INTA group) is plugged into
the fourth PCI slot, the INTA group interrupt for this slot is connected to the PIRQD
signal (which also connects to the on-board video source and on-board SB-PCI source).
Accordingly, the add-in board shares the interrupt with these on-board interrupts.
However, in practice, always plug an add-in board with a single interrupt (INTA
group) into the first PCI slot and plug an add-in board with two interrupts (INTA group
and INTB group) into the second PCI slot. INTA for the first slot is connected to
PIRQA. INTA for the second slot is connected to PIRQB and INTB for the second
slot is connected to PIRQC. If no other boards are connected, the three interrupts on
the above two boards are all connected to separate PIRQ signals. Normally, these
interrupts are not shared.
Note!
Internally, the PIIX4E can connect the PIRQ signal lines to any IRQ
signal (3, 4, 5, 7, 9, 11, 14, or 15). Normally, unique interrupts can
be generated for devices that do not share PIRQ signals. However,
in certain cases when interrupt restrictions apply, two or more PIRQ
signal lines can be connected to the same IRQ signal.
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