FX3 Programmers Manual, Doc. # 001-64707 Rev. *C 111
FX3 Serial Peripheral Register Access
9.1.2.11 I2C_EGRESS_DATA register
This register will hold the data to be written to the I2C slave while in register mode
(I2C_CONFIG.DMA_MODE=0). This data will be added to a TX FIFO maintained by the I2C block
and then sent to the slave.
9.1.2.12 I2C_INGRESS_DATA register
This register holds the data that has been read from the I2C slave in register mode
(I2C_CONFIG.DMA_MODE=0). This register needs to continuously read until all of the data from the
RX FIFO has been drained.
9.1.2.13 I2C_BYTE_COUNT register
Firmware writes to this register to specify the length of data to be transferred from/to the slave.
7START_FIRSTRRW1
1: Send START before the first byte of
preamble
0: Do nothing before the first byte of pre-
amble
28 READ R RW 0
0: The data phase is a write operation
1: The data phase is a read operation
After command, the HW will idle if no valid
pre-amble exists, will play preamble if it
does exist.
31:30 I2C_STAT W R 0
00: I2C is idle.
01: I2C is playing the preamble.
10: I2C is receiving data.
11: I2C is transmitting data.
Bits Field Name
HW
Access
SW
Access
Default
Value
Description
7:0 DATA R W 0
Data byte to be written to the peripheral in
registered mode.
Bits Field Name
HW
Access
SW
Access
Default
Value
Description
7:0 DATA RW R 0
Data byte read from the peripheral in regis-
tered mode.
Bits Field Name
HW
Access
SW
Access
Default Value Description
31:0 BYTE_COUNT R RW 0xFFFFFFFF
Number of bytes in the data phase of the
transfer.
Bits Field Name
HW
Access
SW
Access
Default
Value
Description
To Next Page
Loading...