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Denon DCD-3560 - CXD1125 Q IC Terminal Functions; CXD1125 Q Terminal Details

Denon DCD-3560
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30
CXD112SQ
Terminal Function
Terminal
Terminal
I/O
I
Terminal
Function
No.
Symbol
1
FSW
0
Output
to
shift
time
constant
of
output
filter
for
spindle
motor.
2
MON
0
ON/OFF
control
output
for
spindle
motor.
3
MOP
0
Drive
output
for
spindle
motor.
Rough
control
at
CLV-S
mode
and
phase
control
at
CLV-P
mode.
4
MDS
0 Drive
output
for
spindle
motor.
Speed
control
at
CLV-P
mode.
5
EFM
I
Input
of
EFM
signal
from
RF
amplifier.
6
ASY
0
Output
to
control
slice level
of
EFM
signal.
7
LOCK
0
i
Sampling
GFS
signal
by
WFCK/16
and
if
it
is
"H",
delivers
"H";
if
it
is
continuously
"L"
8 times, delivers
"L".
8
VCOO
0
!
VCO
output.
When
EFM
signal
is
locked,
f=8.6436
MHz.
9
VCOI
I
!
VCO
input.
10
TEST
I
I
(OV).
11
PDO
0
,
Phase
comparing
output
for
EFM
signal and
VCO/2.
12
Vss
-
:
GND
(OV).
13
CLK
I
;
Serial data
transfer
clock
input
from
CPU. Latches data
by
rising edge
of
clock.
14
XLT
I
Input
of
Latch
from
CPU. Latches
8-bit
shift
register data (serial data
from
CPU)
to
each register.
15
DATA
I
I
Input
of
serial data
from
CPU.
16
XRST
I
!
System reset inpu
t.
Resets
at
"L".
17
CNIN
I
Input
of
tracking
pulse.
18
SENS
0
!
Answer
to
address,
output
internal
condition.
19
MUTG
I
i
Input
of
muting.
When
internal
register A's
ATTM
is
in
"L",
and
MUTG
is
in
"L"
for
normal
condition;
"f;l"
for
no
sound
condition.
20
CRCF
0
I
Output
of
CRC
check
result
of
sub-code Q.
!
21
EXCK
I
Clock
input
for
serial
output
of
sub-eode.
22
SBSO
0
!
Serial
output
of
sub-eode.
23
SUBQ
0
I
Q
output
of
sub-eode.
24
SCOR
0
Output
of
sub-code sync.
SO
+ S1.
25
SQCK
I/O
i Reading
clock
of
sub-eode Q.
26
SQEX
I Selection
input
of
SQCK.
27
DOTX
0
Digital
out
output.
(When
CXD1130Q
or
DO
is
OFF,
output
WFCK.)
28
GFS
0
Output
of
indication
for
frame
sync
lock
condition.
29
DB08
I/O
Data
terminal
of
external
RAM.
DATA8
(MSB).
30
DB07
I/O
Data
terminal
of
external
RAM.
DATA7.
31
DB06
I/O
Data
terminal
of
external
RAM.
DATA6.
32
DB05
I/O
Data
terminal
of
external
RAM.
DATA5.
33
V
oo
-
Power
supply
(+5V).
34
DB04
I/O
Data
terminal
of
external
RAM.
DATA4.
35
OB03
I/O
Data
terminal
of
external
RAM.
DATA3.
36
DB02
I/O
Data
terminal
of
external
RAM.
DATA2.
37
DB01
I/O
Data
terminal
of
external
RAM.
DATA1
(LSB).
38
RA01
0
Address
output
of
external
RAM.
ADOR01
(LSB).
39
RA02
0 Address
output
of
external
RAM.
ADDR02.
40
RA03
0 Address
output
of
external
RAM.
ADDR03.
41
RA04
0
Address
output
of
external
RAM.
AODR04.
42
RA05
0
Address
output
of
external
RAM.
ADDR05.
43
RA06
0 Address
output
of
external
RAM.
ADDR06.
44
RA07
0
Address
output
of
external
RAM.
ADDR07.
45
RA08
0 Address
output
of
external
RAM.
ADDR08.

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