DIGITAL-LOGIC AG MSM586SEN/SEV Manual V1.5E
50
I/O Ad-
dress
Read/Write
Status
Description
0008h W DMA channel 0-3 command register
bit 7 = DACK sense active high/low
0 low
1 high
bit 6 = DREQ sense active high/low
0 low
1 high
bit 5 = Write selection
0
Late write selection
1 Extended write selection
bit 4 = Priority
0 Fixed
1 Rotating
bit 3 = Timing
0 Normal
1 Rotating
bit 2 = Controller enable/disable
0 Enable
1 Disable
bit 1 = Memory-to-memory enable/disable
0 Disable
1 Enable
bit 0 = Reserved
0009h W DMA write request register
000Ah R / W DMA channel 0-3 mask register
bits 7-3 = Reserved
bit 2 = 0 Clear bit
1 Set bit
bits 1-0 = Channel Select
00 Channel 0
01 Channel 1
10 Channel 2
11 Channel 3
00Bh W DMA channel 0-3 mode register
bits 7-6 = 00 Demand mode
01 Single mode
10 Block mode
11 Cascade mode
bit 5 = 0 Address increment select
1 Address decrement select
bit 4 = 0 Disable auto initialization
1 Enable auto initialization
bits 3-2 = Operation type
00 Verify operation
01 Write to memory
10 Read from memory
11 Reserved
bits 1-0 = Channel select
00 Channel 0
01 Channel 1
10 Channel 2
11 Channel 3
Continued..
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