Dwin T5L ASIC Series - Page 9

T5L_ASIC Development Guide
- 9 -
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D WI N T echnology
Pro f essional , Credi t able , Success f ul
GUI
102
P5.3
I/O port
LCD_G3
LCD interface
GUI
103
P5.4
I/O port
LCD_G4
LCD interface
GUI
104
P5.5
I/O port
LCD_G5
LCD interface
GUI
105
P5.6
I/O port
LCD_G6
LCD interface
GUI
106
P5.7
I/O port
LCD_G7
LCD interface
GUI
107
VDD
T5L1=1.25V
T5L2=1.2V
GUI
108
VIO
3.3V
GUI
109
P6.0
I/O port
LCD_R0
LCD interface
GUI
110
P6.1
I/O port
LCD_R1
LCD interface
GUI
111
P6.2
I/O port
LCD_R2
LCD interface
GUI
112
P6.3
I/O port
LCD_R3
LCD interface
GUI
113
P6.4
I/O port
LCD_R4
LCD interface
GUI
114
P6.5
I/O port
LCD_R5
LCD interface
GUI
115
P6.6
I/O port
LCD_R6
LCD interface
GUI
116
P6.7
I/O port
LCD_R7
LCD interface
GUI
117
VDD
T5L1=1.25V
T5L2=1.2V
GUI
118
VIO
3.3V
Note that the pads on the bottom of the IC must be reliably grounded, otherwise the performance of the
IC will be affected.