2-21
EMP-9000/8000
SEIKO EPSON Revision:A
Process outline of Driver Board Assy
• The CPU (IC900) read the data stored in EE-PROM (correction parameter), and regulate
operation mode of the correction circuit (IC200/300).
• The display data output from the Main board Assy unit are once the signal timing is com-
bined by the bus data changer (IC100) before output to the correction circuit.
• The timing signals and analog video signals output from the correction circuit are done
electric correction by DAC for best display quality before output.
• The RGB video bias circuit generate standard voltage for video amplifier circuit based on
control signal output from driver circuit.
• Each shift register generates the display data of 24 bit from 4 analog signals.
• The LCCOM circuit generate standard voltage for the light valve driver (LCD) based on
three display voltage control (R/G/B) output from the correction circuit DAC.
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