Appendix System Manual Modular Systems
Page 108 of 114 HI 800 191 E Rev. 2.02
Index of Figures
Figure 1: Line Control 19
Figure 2: Pulsed Signals T1 and T2 20
Figure 3: safeethernet/Ethernet Networking Example 26
Figure 4: CPU Cycle Sequence with Multitasking 35
Figure 5: Multitasking Mode 1 38
Figure 6: Multitasking Mode 2 39
Figure 7: Multitasking Mode 3 40
Figure 8: Minimum Clearances Applying for the HIMatrix F60 50
Figure 9: Securing the F60 Subrack 51
Figure 10: Securing the Cables and Connecting the Shielding 52
Figure 11: Communication System Properties - CPU OS up to V7 89
Figure 12: Creating a Port Configuration - CPU OS up to V7 89
Figure 13: Parameters of a Port Configuration - CPU OS up to V7 90
Figure 14: Peer-to-Peer Parameters in the Inputs Tab - CPU OS up to V7 92
Figure 15: Connection Control System Signal in the Outputs Tab - CPU OS up to V7 92
Figure 16: Setting the Parameters in the P2P Editor - up to CPU OS V7 93
Figure 17: Assigning Process Signals per Drag&Drop - CPU OS up to V7 94
Figure 18: Example of Process Signals - CPU OS up to V7 94
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