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Hitachi UX2 - Page 8

Hitachi UX2
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7
(8) Bit configurations
Format A and B
Format C and D
Format E
Format F
Format G and H
Format
I and J
Order of code transmission: Transmission occurs beginning with the least significant bit (b0).
(9) Error control
Vertical parity error (detection on an individual character basis)
Framing error
Start
b
0
b
1
b
2
b
3
b
4
b
5
b
6
Parity
Stop
Stop
Start
b
0
b
1
b
2
b
3
b
4
b
5
b
6
Parity
Stop
Start
b
0
b
1
b
2
b
3
b
4
b
5
b
6
b
7
Stop
Stop
Start
b
0
b
1
b
2
b
3
b
4
b
5
b
6
b
7
Stop
Start
b
0
b
1
b
2
b
3
b
4
b
5
b
6
b
7
Parity
Stop
Start
b
0
b
1
b
2
b
3
b
4
b
5
b
6
b
7
Parity
Stop
Stop

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