Rev. 1.71 12 April 11, 2017 Rev. 1.71 13 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F004
Pin Name Function OPT I/T O/T Description
PA0/PTP0/
OCDSDA/
ICPDA
PA0
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
PTP0 PASR — CMOS PT0 output
OCDSDA — ST CMOS On Chip Debug System Data Line (OCDS EV only)
ICPDA — ST CMOS ICP Data Line
PA1/PTP0I
PA1
PAWU
PAPU
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
PTP0I — ST — PTM0 input
PA2/ICPCK/
OCDSCK
PA2
PAWU
PAPU
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
ICPCK — ST CMOS ICP Clock Line
OCDSCK — ST —
On Chip Debug System Clock Line (OCDS EV
only)
PA3/PTP1I
PA3
PAWU
PAPU
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
PTP1I — ST — PTM1 input
PA4/PTCK1/
AN3
PA4
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
PTCK1 PASR ST — PTM1 clock input
AN3 PASR AN — ADC input channel 3
PA5/AN4/VREF
PA5
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
AN4 PASR AN — ADC input channel 4
VREF PASR AN — ADC VREF Input
PA6/AN5/
VREFO
PA6
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
AN5 PASR AN — ADC input channel 5
VREFO PASR — AN ADC reference voltage output
PA7/PTP1/AN6
PA7
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
PTP1 PASR — CMOS PTM1 output
AN6 PASR AN — ADC input channel 6
PB0/INT0/AN0
PB0
PBPU
PBSR
ST CMOS General purpose I/O. Register enabled pull-up
INT0 PBSR ST — External interrupt input
AN0 PBSR AN — ADC input channel 0
PB1/INT1/AN1
PB1
PBPU
PBSR
ST CMOS General purpose I/O. Register enabled pull-up
INT1 PBSR ST — External interrupt input
AN1 PBSR AN — ADC input channel 1
PB2/PTCK0/
AN2
PB2
PBPU
PBSR
ST CMOS General purpose I/O. Register enabled pull-up
PTCK0 PBSR ST — PTM0 clock input
AN2 PBSR AN — ADC input channel 2