Holtek HT66F002 - SLOW Mode; SLEEP0 Mode; SLEEP1 Mode; IDLE0 Mode

Rev. 1.71 40 April 11, 2017 Rev. 1.71 41 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
SLOW Mode
Thisisalsoamodewherethemicrocontrolleroperatesnormallyalthoughnowwithaslower
speedclocksource.TheclocksourceusedwillbefromthelowspeedoscillatorLIRC.Running
themicrocontrollerinthismodeallowsittorunwithmuchloweroperatingcurrents.IntheSLOW
Mode,thef
H
isoff.
SLEEP0 Mode
TheSLEEPModeisenteredwhenanHALTinstructionisexecutedandwhentheIDLENbitinthe
SMODregisterislow.IntheSLEEP0modetheCPUwillbestopped,andthef
LIRC
clockwillbe
stoppedtoo,andtheWatchdogTimerfunctionisdisabled.
SLEEP1 Mode
TheSLEEPModeisenteredwhenanHALTinstructionisexecutedandwhentheIDLENbitinthe
SMODregisterislow.IntheSLEEP1modetheCPUwillbestopped.Howeverthef
LIRC
clockswill
continuetooperateiftheWatchdogTimerfunctionisenabled.
IDLE0 Mode
TheIDLE0ModeisenteredwhenaHALTinstructionisexecutedandwhentheIDLENbitinthe
SMODregisterishighandtheFSYSONbitintheSMOD1registerislow.IntheIDLE0Modethe
systemoscillatorwillbeinhibitedfromdrivingtheCPUbutsomeperipheralfunctionswillremain
operationalsuchastheWatchdogTimerandTMs.IntheIDLE0Mode,thesystemoscillatorwillbe
stopped.
IDLE1 Mode
TheIDLE1ModeisenteredwhenaHALTinstructionisexecutedandwhentheIDLENbitinthe
SMODregisterishighandtheFSYSONbitintheSMOD1registerishigh.IntheIDLE1Modethe
systemoscillatorwillbeinhibitedfromdrivingtheCPUbutmaycontinuetoprovideaclocksource
tokeepsomeperipheralfunctionsoperationalsuchastheWatchdogTimerandTMs.IntheIDLE1
Mode,thesystemoscillatorwillcontinuetorun,andthissystemoscillatormaybehighspeedorlow
speedsystemoscillator.IntheIDLE1Mode,theWatchdogTimerclock,f
LIRC
,willbeon.
Control Register
Asingleregister,SMOD,isusedforoverallcontroloftheinternalclockswithinthedevice.
SMOD Register
Bit 7 6 5 4 3 2 1 0
Name CKS2 CKS1 CKS0 — LTO HTO IDLEN HLCLK
R/W R/W R/W R/W — R R R/W R/W
POR 0 0 0 — 0 0 1 1
B
it7~5 CKS2 ~ CKS0:ThesystemclockselectionwhenHLCLKis“0”
000:f
L
(f
LIRC
)
001:f
L
(f
LIRC
)
010:f
H
/64
011:f
H
/32
100:f
H
/16
101:f
H
/8
110:f
H
/4
111:f
H
/2
Thesethreebitsareusedtoselectwhichclockisusedasthesystemclocksource.Inaddition
tothesystemclocksource,whichcanbetheLIRC,adividedversionofthehighspeedsystem
oscillatorcanalsobechosenasthesystemclocksource.