Holtek HT66F002 - Timer;Counter Mode; PWM Output Mode

Rev. 1.71 76 April 11, 2017 Rev. 1.71 77 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Timer/Counter Mode
Toselectthismode,bitsST0M1andST0M0intheSTM0C1registershouldbesetto11
respectively.TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutput
Modegeneratingthesameinterruptflags.TheexceptionisthatintheTimer/CounterModethe
STMoutputpinisnotused.ThereforetheabovedescriptionandTimingDiagramsfortheCompare
MatchOutputModecanbeusedtounderstanditsfunction.AstheSTMoutputpinisnotusedin
thismode,thepincanbeusedasanormalI/Opinorotherpin-sharedfunctionbysettingpin-share
functionregister.
PWM Output Mode
Toselectthismode,bitsST0M1andST0M0intheSTM0C1registershouldbesetto10respectively
andalsotheST0IO1andST0IO0bitsshouldbesetto10respectively.ThePWMfunctionwithin
theSTMisusefulforapplicationswhichrequirefunctionssuchasmotorcontrol,heatingcontrol,
illuminationcontroletc.Byprovidingasignalofxedfrequencybutofvaryingdutycycleonthe
STMoutputpin,asquarewaveACwaveformcanbegeneratedwithvaryingequivalentDCRMS
values.
AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated
waveformisextremelyexible.InthePWMoutputmode,theST0CCLRbithasnoeffectasthe
PWMperiod.BothoftheCCRAandCCRPregistersareusedtogeneratethePWMwaveform,one
registerisusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency,while
theotheroneisusedtocontrolthedutycycle.Whichregisterisusedtocontroleitherfrequency
ordutycycleisdeterminedusingtheST0DPXbitintheSTM0C1register.ThePWMwaveform
frequencyanddutycyclecanthereforebecontrolledbythevaluesintheCCRAandCCRPregisters.
Aninterruptag,oneforeachoftheCCRAandCCRP,willbegeneratedwhenacomparematch
occursfromeitherComparatorAorComparatorP.TheST0OCbitintheSTM0C1registerisused
toselecttherequiredpolarityofthePWMwaveformwhilethetwoST0IO1andST0IO0bitsare
usedtoenablethePWMoutputortoforcetheSTMoutputpintoaxedhighorlowlevel.The
ST0POLbitisusedtoreversethepolarityofthePWMoutputwaveform.
• 10-bit STM, PWM Output Mode, Edge-aligned Mode, ST0DPX=0
CCRP 001b 010b 011b 100b 101b 110b 111b 000b
Period 128 256 384 512 640 768 896 1024
Duty CCRA
Iff
SYS
=16MHz,TMclocksourceisf
SYS
/4,CCRP=100bandCCRA=128,
TheSTMPWMoutputfrequency=(f
SYS
/4)/512=f
SYS
/2048=7.8125kHz,duty=128/512=25%.
IftheDutyvaluedenedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe
PWMoutputdutyis100%.
• 10-bit STM, PWM Output Mode, Edge-aligned Mode, ST0DPX=1
CCRP 001b 010b 011b 100b 101b 110b 111b 000b
Period CCRA
Duty 128 256 384 512 640 768 896 1024
ThePWMoutputperiodisdeterminedbytheCCRAregistervaluetogetherwiththeSTMclock
whilethePWMdutycycleisdenedbytheCCRPregistervalue.