Rev. 1.71 94 April 11, 2017 Rev. 1.71 95 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Capture Input Mode
ToselectthismodebitsPTnM1andPTnM0inthePTMnC1registershouldbesetto01respectively.
Thismodeenablesexternalsignalstocaptureandstorethepresentvalueoftheinternalcounter
andcanthereforebeusedforapplicationssuchaspulsewidthmeasurements.Theexternalsignal
issuppliedonthePTPnIorPTCKnpin,selectedbythePTnCKSbitinthePTMnC1register.The
inputpinactiveedgecanbeeitherarisingedge,afallingedgeorbothrisingandfallingedges;the
activeedgetransitiontypeisselectedusingthePTnIO1andPTnIO0bitsinthePTMnC1register.
ThecounterisstartedwhenthePTnONbitchangesfromlowtohighwhichisinitiatedusingthe
applicationprogram.
WhentherequirededgetransitionappearsonthePTPnIorPTCKnpinthepresentvalueinthe
counterwillbelatchedintotheCCRAregisterandaTMinterruptgenerated.Irrespectiveofwhat
eventsoccuronthePTPnIorPTCKnpinthecounterwillcontinuetofreerununtilthePTnONbit
changesfromhightolow.WhenaCCRPcomparematchoccursthecounterwillresetbacktozero;
inthiswaytheCCRPvaluecanbeusedtocontrolthemaximumcountervalue.WhenaCCRP
comparematchoccursfromComparatorP,aTMinterruptwillalsobegenerated.Countingthe
numberofoverowinterruptsignalsfromtheCCRPcanbeausefulmethodinmeasuringlongpulse
widths.ThePTnIO1andPTnIO0bitscanselecttheactivetriggeredgeonthePTPnIorPTCKnpin
tobearisingedge,fallingedgeorbothedgetypes.IfthePTnIO1andPTnIO0bitsarebothsethigh,
thennocaptureoperationwilltakeplaceirrespectiveofwhathappensonthePTPnIorPTCKnpin,
howeveritmustbenotedthatthecounterwillcontinuetorun.
AsthePTPnIorPTCKnpinispinsharedwithotherfunctions,caremustbetakenifthePTMisin
theCaptureInputMode.Thisisbecauseifthepinissetupasanoutput,thenanytransitionsonthis
pinmaycauseaninputcaptureoperationtobeexecuted.ThePTnCCLR,PTnOCandPTnPOLbits
arenotusedinthisMode.