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Holtek HT66F002 - Programming Considerations

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Rev. 1.71 36 April 11, 2017 Rev. 1.71 37 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Programming Considerations
CaremustbetakenthatdataisnotinadvertentlywrittentotheEEPROM.ProtectioncanbePeriodic
byensuringthattheWriteEnablebitisnormallyclearedtozerowhennotwriting.AlsotheBank
PointercouldbenormallyclearedtozeroasthiswouldinhibitaccesstoBank1wheretheEEPROM
controlregisterexist.Althoughcertainlynotnecessary,considerationmightbegiveninthe
applicationprogramtothecheckingofthevalidityofnewwritedatabyasimplereadbackprocess.
WhenwritingdatatheWRbitmustbesethighimmediatelyaftertheWRENbithasbeensethigh,
toensure thewritecycleexecutescorrectly.TheglobalinterruptbitEMIshouldalsobecleared
beforeawritecycleisexecutedandthenre-enabledafterthewritecyclestarts.Notethatthedevices
shouldnotentertheIDLEorSLEEPmodeuntiltheEEPROMreadorwriteoperationistotally
complete.Otherwise,theEEPROMreadorwriteoperationwillfail.
Programming Examples
Reading data from the EEPROM - polling method
MOV A, EEPROM_ADRES ; user dened address
MOV EEA, A
MOV A, 040H ; setup memory pointer MP1
MOV MP1, A ; MP1 points to EEC register
MOV A, 01H ; setup Bank Pointer
MOV BP, A
SET IAR1.1 ; set RDEN bit, enable read operations
SET IAR1.0 ; start Read Cycle - set RD bit
BACK:
SZ IAR1.0 ; check for read cycle end
JMP BACK
CLR IAR1 ; disable EEPROM write
CLR BP
MOV A, EED ; move read data to register
MOV READ_DATA, A
Writing Data to the EEPROM - polling method
MOV A, EEPROM_ADRES ; user dened address
MOV EEA, A
MOV A, EEPROM_DATA ; user dened data
MOV EED, A
MOV A, 040H ; setup memory pointer MP1
MOV MP1, A ; MP1 points to EEC register
MOV A, 01H ; setup Bank Pointer
MOV BP, A
CLR EMI
SET IAR1.3 ; set WREN bit, enable write operations
SET IAR1.2 ; start Write Cycle - set WR bit– executed immediately after
; set WREN bit
SET EMI
BACK:
SZ IAR1.2 ; check for write cycle end
JMP BACK
CLR IAR1 ; disable EEPROM write
CLR BP

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