Holtek HT66F002 - Page 86

Rev. 1.71 86 April 11, 2017 Rev. 1.71 87 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
IntheCompareMatchOutputMode,thePTnIO1andPTnIO0bitsdeterminehowtheTMoutput
pinchangesstatewhenacomparematchoccursfromtheComparatorA.TheTMoutputpincan
besetuptoswitchhigh,switchlowortotoggleitspresentstatewhenacomparematchoccurs
fromtheComparatorA.Whenthesebitsarebothzero,thennochangewilltakeplaceonthe
output.TheinitialvalueoftheTMoutputpinshouldbesetupusingthePTnOCbit.Notethatthe
outputlevelrequestedbythePT1IO1andPTnIO0bitsmustbedifferentfromtheinitialvalue
setupusingthePTnOCbitotherwisenochangewilloccurontheTMoutputpinwhenacompare
matchoccurs.AftertheTMoutputpinchangesstate,itcanberesettoitsinitiallevelbychanging
thelevelofthePTnONbitfromlowtohigh.
InthePWMMode,thePTnIO1andPTnIO0bitsdeterminehowtheTMoutputpinchanges
statewhenacertaincomparematchconditionoccurs.ThePWMoutputfunctionismodiedby
changingthesetwobits.ItisnecessarytochangethevaluesofthePTnIO1andPTnIO0bitsonly
aftertheTMhasbeenswitchedoff.UnpredictablePWMoutputswilloccurifthePTnIO1and
PTnIO0bitsarechangedwhentheTMisrunning.
Bit3 PTnOC:PTPn/PTPnBOutputcontrolbit
CompareMatchOutputMode
0:initiallow
1:initialhigh
PWMMode/SinglePulseOutputMode
0:Activelow
1:Activehigh
ThisistheoutputcontrolbitfortheTMoutputpin.ItsoperationdependsuponwhetherTMis
beingusedintheCompareMatchOutputModeorinthePWMMode/SinglePulseOutputMode.
IthasnoeffectiftheTMisintheTimer/CounterMode.IntheCompareMatchOutputMode
itdeterminesthelogicleveloftheTMoutputpinbeforeacomparematchoccurs.InthePWM
ModeitdeterminesifthePWMsignalisactivehighoractivelow.
Bit2 PTnPOL:PTPn/PTPnBOutputpolarityControl
0:non-invert
1:invert
ThisbitcontrolsthepolarityofthePTPn/PTPnBoutputpin.WhenthebitissethightheTM
outputpinwillbeinvertedandnotinvertedwhenthebitiszero.IthasnoeffectiftheTMisin
theTimer/CounterMode.
Bit1 PTnCKS:PTMcapturetriggersourceselect
0:FromPTPnI
1:FromPTCKnpin
Bit0 PTnCCLR:SelectPTMCounterclearcondition
0:PTMComparatrorPmatch
1:PTMComparatrorAmatch
Thisbitisusedtoselectthemethodwhichclearsthecounter.RememberthatthePeriodicTM
containstwocomparators,ComparatorAandComparatorP,either ofwhichcanbeselectedto
cleartheinternalcounter.WiththePTnCCLRbitsethigh,thecounterwillbeclearedwhena
comparematchoccursfromtheComparatorA.Whenthebitislow,thecounterwillbecleared
whenacomparematchoccursfromtheComparator Porwithacounteroverflow.Acounter
overowclearingmethodcanonlybeimplementediftheCCRPbitsareallclearedtozero.The
PTnCCLRbitisnotusedinthePWM,SinglePulseorInputCaptureMode.