HP 5300A - Page 25

If the digit select lines are left open or held high, the
counter will be disconnected from the character gene-
rator allowing data from the plug-on module to be
displayed. Mainframe and plug-on data can also be
combined in the display with the correct combination
of digit address code and digit select code. The digit
address code identifies the digit position in the dis-
play, with digit 0 being the least significant digit. The
digit select code selects the digit position in the main-
frame counter with zero selecting the least significant
digit position.
4~35. A1U3 COUNTER
This counter is a large-scale MOS integrated
circuit. Its inputs are susceptible to damage
by high yoltages (+5.6 volts) and_ static
charges. Particular care should be exercised
when servicing this circuit or handling it under
conditions where static charges can build up.
4-36. The information displayed on the 5300A is nor-
mally counted in A1U3 Counter integrated circuit.
Table 4-1.
CHARACTER
Model 5300A
Theory of Operation
This circuit consists of six decade-counting elements,
an overflow register, a 25-bit latch, and output multi-
plexing circuits. Figure 4-7 is a basic block diagram
of AlU3. The counter can accumulate and store up to
1 million pulses at its input. The input triggers on the
positive-going edge of the input pulse, which is de-
rived from the control circuit, Al1U5: The Al1U5 input
signal is the F1 signal from the plug-on. The TRANS-
FER input at AlU3(4) transfers data from the decade
counters to the latch circuits when the TRANSFER
line is low. When the TRANSFER line is high, data is
stored in the latch circuits. The RESET input at pin
11 resets the decades when the RESET signal is high.
One million or more input counts into the counter sets
the overflow register, which causes the OVERFLOW
output at pin 7 to go high following a TRANSFER
signal.
4-37. The counter output is available one-digit at a
time as a four-bit, binary-coded-decimal signal
(logical 1 is high). The digit selected at the output is
determined by the binary-coded digit select code at
pins 8, 9, and 10. Binary G (all low) selects the least
significant decade. Binary 5 selects the most signifi-
cant decade in the register. A select code of binary 7
Character Generator Coding
A1U2 INPUTS A1U2 OUTPUTS (LED INPUTS) X = ENABLED
hu
peseaul
ales
ee
LEFT
RIGHT
LEFT
RIGHT
LEFT
RIGHT
LEFT
RIGHT
LEFT
RIGHT
LEFT
RIGHT
7 LEFT
7 RIGHT
8
9 LEFT
9 RIGHT
MINUS
BLANK
Oanun FF bo wWwnNrNM ee O
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
H
H
L
mRBrereorrrm eet mtrrrieremmmarerrht
mzrererererm me eee eee PP ere ee
eee, ee a ee oP SY bes ES SS Sb eS Es tt)
meremererererer ee
moo
~~ Km KM Mm MM MM
~ mm MM mM MM
4-7