HP 83522A - Page 216

Service Model 83522A
Figure 8-2. Hex Data Rotation Write - Bit Pattern
I 20 psec I - 0.7p sec I -30 psec I
!-I ++ I-I
ENABLE
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D0
;
D 1
THRU
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J 1
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1
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Figure 8-3.
Hex Addressed Fast Read - Timing Diagram
8-8
I
3
-0.7wec +
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-9psec
I I
1
1 I I
I
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1
-- 4V
ENABLE
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L 6
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I 1
L7
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I
I I I I
r
I *
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*DURATION OF LAST BIT PULSE IS APPROXIMATELY 30pSEC DUE TO DELAY BETWEEN RECYCLE.
J
- 0.3V
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3-STATE
DQ -D7 - OV
VALID DATA VALID DATA