Service
Model
83522A
A4
ALC
Assembly
The A4 ALC assembly receives its inputs from one of the two detectors, and
selects one of them for leveling. The sources include DC1 Directional Dectector,
the "External" input (external negative detector), and a third position which
inverts the polarity of the external input (power meter detection). The selected
detector voltage is proportional to the peak RF amplitude. The Input Sample
&
Hold stores the detected level during pulse modulation. This prevents
subsequent circuits from saturating when the RF power drops out during
blanking or pulse modulation. The Logger amplifier produces a voltage
proportional to the log of peak RF amplitude, and essentially represents the RF
power level in dB.
The reference, or desired, power level is established digitally by a 12-bit DAC,
scaling the
-10V
REF
from the A6 assembly. This establishes
a
voltage
proportional to the desired output level in dBm. The External
AM
signal from
the
8350A Sweep Oscillator, and the PWWSWP COMP signal from the A5 FM
Driver assembly (described below), are summed in to produce PWR REF.
The second summing junction adds two more component signals. One is the
External Cal, an offset voltage from the front panel used to calibrate absolute
power when external leveling is used. The
1
dB Marker signal from the
A7
assembly is also added, producing a dip in the
RF
output power when
amplitude markers are activated. The final product of the power reference chain
is
a
reference voltage representing the desired RF output amplitude.
The ultimate goal of the leveling loop is to make the actual RF power equal to
the desired RF power. A third summing junction compares the voltages
representing these two quantities, and yields a signal representing the error
between actual and desired power. An additional error voltage is injected at this
point to compensate band flatness only. This error voltage is sampled and held
during pulse modulation to prevent subsequent circuits from saturating. The
held error signal is amplified, and the RF blanking signal added to modulate
the RF power for pulse modulation, without saturating any other components in
the path. The Modulator driver then provides the current drive needed to
control the diode modulator in the RF path. A pulse input to the MOD driver
provides pulse modulation. An additional circuit monitors the input to the
modulator drivers, and lights a front panel UNLEVELED LED if this voltage
exceeds the normal range for leveled power.
A5
FM
Driver
The A5 FM Driver assembly includes circuits to produce the PWR/SWP COMP
signal added to yield the PWR REF. The Power Sweep function is achieved by
scaling the VSW sweep voltage with a DAC. By programming the appropriate scale
factor, a voltage representing
dB/GHZ or dB/Sweep is produced.
The ALC Compensation is a four-breakpoint, adjustable slope network which
compensates for fixed frequency-dependent nonlinearities in the
RF
path,
typically the coupler. Its input is FREQ TRK V, a voltage exactly proportional to
frequency. This signal drives an array of four transistors, and their outputs are
summed together to yield the ALC compensation signal. The gain of each
transistor, and the voltage at which that transistor begins to conduct, are
adjustable. A ninth adjustment adds the FREQ TRK V directly. In this way,
a
complicated compensation function, approximated by five straight lines, is
produced.
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