Service
Model
83522A
Digital Control
The Address Decoder, Input Data Latches, and Frequency Cal Switches/Output
Data Buffers comprise the digital control for the A6 assembly. A failure in these
components usually results in large frequency errors, and will often disable the
bandswitch circuitry.
To check the address decoding circuitry enter
SHIFT
5
4
and perform the
following:
1.
Examine LINST2 (PI- 18) for activity. If none is found, troubleshoot the A3
assembly.
2.
If
LINST2 is functional, check each of the LENn lines (U25) for the pulses
shown in Figure 8-52. If these are incorrect, but the address lines show
activity, replace U25. If the address lines seem locked high or low,
troubleshoot the address buffer on the A3 assembly.
NOTE
U3,
U4,
and U7 are checked by reading data while changing
switch settings. Before altering the switch settings on
A6S1
and
A6S2,
note the present configuration. Return the
switches to their original status after troubleshooting. If this
is not done, the frequency endpoints will have to be
recalibrated.
3.
To check status buffer U7, press INSTR
PRESET
.
Set the 8350A for a 5-
second sweep rate and make the following key entries:
SHIFT
0
0
Enters the Hex Data command
2
GHzs
8
6
Address location 2C86 (U7)
M3
Hex Data Read
The hex digits displayed in the
8350A front panel FREQUENCYITIME
window should change as the status read by U7 changes between forward
sweep and retrace. Raising the power level until the UNLEVELED light
comes on should also change the status bit being read by U7. Switches
S1
and S2 can be toggled to test the two last bits.
4.
U3 and U4 can each be checked with Hex Data Read (see above) at address
2C84 or 2C85. The hex digits should change when the corresponding Freq
Cal switches are changed,
5. Exercise U22 with Hex Data Rotation Write. Enter:
SHIFT
0
0
Enters
Hex
Data command
2
GHzs
8
Address location 2C83 (U22)
M4
Hex Data Rotation Write
Check the outputs of U22 against the waveforms shown in Figure 8-2.
6.
The remaining three
latches-U8, U13, and U18-can be checked by selecting
a
CW
frequency of 2.4 GHz and pressing
SHIFT
5
2
,
to initiate the
ScalingIOffset DAC Test. The waveforms at TPl and TP2 should be
checked against those in Figure 8-53.
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