Theory
of
Operation
2-7
Supervisor Board
The supervisor board contains most of the monitoring, control,
and
fault-indicating circuitry for the
power supply assembly.
The overvoltage
and
undervoltage monitor checks the voltage outputs of
all
secondary board
power supplies. The monitor also checks the
+ 5V output
and
the peak power monitor from the
primary board. If a fault
is
detected, the pulse width modulators are disabled, the shutdown
sequence
is
enabled,
and
the appropriate LEOs are
lit.
Temperature monitors check the power supply assembly thermistor, described
in
preceding para-
graphs,
and
the processor stack thermistor. When the processor stack temperature exceeds 100°C
or the power supply temperature exceeds 97°C, this board generates the power
fail
warning
(NPFW) signal
and
initiates the shutdown sequence.
A
+ 10V reference supply provides the voltage condition references for over
and
under voltage
monitoring
and
temperature sensing. This supply
is
enabled by the + 16V bias supply from the
primary board.
The fan control circuitry provides a constant
-10V
to the
110
card cage fan (FANIon Figure 2-3)
whenever power
is
on
..
This fan
is
not stepped
and
never changes speed. The fan control circuitry
also provides
-10V
(low speed) to the power supply assembly fan
(FANP)
and
processor stack fan
(FANF)
as long as the power supply assembly temperature does not exceed 39°C. When the power
supply assembly thermistor detects between
39°C
and
51°C, the fan control circuitry provides
-12V
(medium speed) to the two fans. Between 51°C
and
97°C, the fans are
prOVided
with
-14V
(high speed). The fan high signal (NFANHI)
is
also sent to the processor which sends a message to
the user, indicating that the computer
is
performing maximum cooling
and
that a further tempera-
ture increase could result
in
shutdown.
If either the
110
door or processor stack door
is
opened
while the power supply assembly
is
operating, the shutdown sequence
is
initiated.
The start-up/shutdown sequence control circuitry
is
controlled by a 30-KHz clock. The signals
generated by this circuitry are defined as follows:
PPON - Primary Power On;
all
outputs
in
specification.
NPV - Not Power Valid; this signal
is
the inverse of PPON,
and
therefore signifies
"not
all
outputs
in
specification".
NPI
--
Not
Pop
In;
used to reset the processor stack.
NSYSPU
--
Not System
Pop
Unsynchronized; used with NPI to cause the processor stack to
perform a self-test.
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