2-14
Theory
of
Operation
The
MC
interfaces the memory
on
the
RAM
board to the MPB. The
MC
uses
27
bits of the MPB
logical address to locate the physical memory address on the
RAM
board. 12 bits of the MPB
address are used as part of the X
and
Y addresses. The other 15 bits select a
mapper
Content-
Addressable Memory
(CAM)
register. The
mapper
CAM
register output
is
used to provide Chip
Select (CS) lines
and
3 more Y address bits for block selection.
One
of four chip select lines selects
one
of four rows of
RAM.
Each row of
RAM
has four 4K word blocks of memory, for a total of 16K
words (four 8 bit bytes
per
word). The row
is
actually comprised of
five
16K by 8 bit
RAM
chips.
Each word has
32
data bits
and
7 checkbits for error detection
and
correction. Data
and
check bits
are transmitted
on
the Memory Data Bus.
The 8-line Memory Address Bus multiplexes 15 address bits. The lower 8 bits comprise the X
address
and
are transmitted from the
MC
first.
The next 7 bits make up the Y address
and
are
transmitted next. The most significant bit of the
Y address
is
ignored
in
the
RAM.
Memory Mapping
The Memory Controller has a memory mapping capability which provides a translation of logical
addresses
on
the MPB to physical addresses
in
RAM.
Mapping memory addresses from the logical
address space of the
MPB to the physical address space of the memory itself allows each MC to
respond to only those addresses of memory under
its
control. It also allows logical addresses to
be
independent of physical addresses. The
MC
has
32
mapper
CAM
registers. Each register
is
associ-
ated with
one
4K block of
RAM.
Each row of memory
is
logically divided into four blocks of 4K words
per
block, 32-bits
per
word
(Figure 2-6). Thus selecting a
mapper
CAM
register selects a particular block of 4K words. The X
and
Y address bits then select a particular word
in
the block. Because the 256K byte
RAM
board
has 64K words, only
16
mapper
CAM
registers are used.
As
shown
in
Figure 2-6, the registers that
are used are
0-3,8-11,16-19,
and
24-27. The remaining registers
(4-7,12-15,20-23,
and
28-31)
are not used
and
their Map
Out
bits (bit 0) should
be
set. The Map
Out
bit
is
described in a following
paragraph.
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