IBM 1 Series - Page 52

jouueyy
O/]
J0ss9901g
Iv-c
+ Device address
compare
- Address bus
bit 16
- Address gate
+ Poll capture
(Fig. 2-18)
- Service gate
- Data strobe
~ Power on reset
- system reset
- Halt or MCHK.
o
Key:
Gd) = device interface with channel
(e) = off-page connection to another figure
AND —@® + DPC selection
IN = negative active signal
t = positive shift required
@ = signal from other
logic on same device
G@-——_> Inverter +—
+ Address gate
© envelope
@® __ - Address
TH AND p._@) gate
AND OR Delay inverter return
()}-—___> Inverter +-—@
Co + Service
(e) gate
+ i return
+
Address.
L—
——e
Service
gate
(Fig.
2-18)
AND
envelope
g.
gate
~ Service
e—
© AND IX) gate
Delay inverter return
+ Service gate
q)—— Inverter
Data Q
OR e,¢ e
conditioning Clock
clay D-Trigger
@ @ - Service
Resets Q (e) gate
I t _ + Data capture
( I )———E} Inver er strobe (Fig. 2-18)
uo degate speed-up
e———__—_Ss
System ready ~ Channel
e———__s IS
OR +) resets
e——_—_N (Fig. 2-18)
Figure 2-16. Tags and data strobe logic