IBM 1 Series - Page 54

Jouueyy
O/]
Josses0ig
tV-C
— Block requests in
(Fig.
2-18)
Inverter
-
Cycle
steal
+
Cycle
steal
request
in
t
mes
®
+
Enabled
CS
request
(Fig.
2-18)
+
Clock
CS
request
(Fig.
2-18)
Prepare
Level
bits
register
[bit
+
Enabled
interrupt
+ Interrupt request
- Poll ID bit 0
- Poll ID bit 1
- Poll ID bit 2
- Poll ID bit 3
- Poll ID bit 4
‘request
(Fig. 2-18)
©
+ Clock interrupt
request
(Fig. 2-18)
Inverter Inverter
Inverter
—Request in
bus bits 0O—15
4-to-16
decode
Gate
Inverter
+ Interrupt
level compare
(Fig. 2-18)
Inverter
Compare Key:
@) = device interface with channel
(e) = off-page connection to another figure
®
Inverter IN = negative active signal
Figure 2-17. Poll mechanism—request and poll ID logic