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Industrial PC
7090
IBM 7090 User Manual
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OR
Accumulator
to
Indicators
OAI
+0043
(I)
Figure
5.3-55
The
logical
OR
of
the
contents
of
the
accumulator
(P,
1-35)
and
the
indicators
is
placed
in
the
sense
indicator
register.
If
a
position
in
either
register
contains
a
one,
a
one
will
be
placed
in
that
position
of
the
indicator.
The
accumulator
is
unchanged.
Exe-
cution
is
accomplished
using
the
sequence
of
PAl
but
omitting
the
indicator
reset.
Reset
Indicators
from
Accumulator
RIA
-0042
(I)
Figure
5.3-55
The
positions
of
the
sense
indicator
register
which
correspond
to
the
positions
of
the
AC
(P,
1-35)
having
"1"
bits
are
reset
to
zero.
Indicator
positions
which
correspond
to
"0"
bits
are
unchanged.
The
AC
is
unchanged.
Invert
Indicator
s
from
Accumulator
IIA
+0041
(I)
Figure
5.3-55
This
instruction
inverts
any
sense
indicator
position
for
which
there
is
a
corre-
sponding
"1"
bit
in
the
accumulator
(P,
1-35).
Transfer
if
Indicators
On
TIO
+0042
(1,
L)
Figure
5.3-56
If
all
of
the
ones
in
the
AC
are
matched
by
ones
in
the
indicator
register,
an
instruc-
tion
transfer
is
taken
to
location
X.
AC
positions
containing
zeros
are
not
compared
with
indicator
positions.
If
all
of
the
ones
are
not
matched,
the
computer
takes
the
next
instruction
in
sequence.
To
execute
this
instruction,
the
complement
of
the
AC
is
OR'ed
with
the
indicator.
If
the
ones
match,
the
result
will
be
all
ones.
The
result
of
the
OR
is
stored
in
the
SR
and
fed
to
the
adder.
A
carry
to
adder
(35)
will
ripple
down
the
adder
and
carry
out
of
the
AD(P).
The
adder
(P)
carry
is
used
to
condition
the
transfer.
Transfer
if
Indicators
Off
TIF
+0046
(1,
L)
Figure
5.3-56
If
all
of
the
ones
in
the
AC
are
matched
by
zeros
in
the
indicator
register,
an
instruc-
tion
transfer
is
taken
to
location
X.
AC
positions
containing
zeros
are
not
compared
with
indicator
positions.
If
all
of
the
ones
are
not
matched,
the
computer
takes
the
next
instruction
in
sequence.
Execution
of
this
instruction
is
identical
to
that
of
TIO,
except
that
the
complement
of
the
indicators
is
OR'ed
to
the
complement
of
the
AC.
Test
procedure
remains
the
same.
On
Test
for
Indicators
ONT
+0446
(I,
E,
2L)
Figure
5.3-57
If
the
ones
contained
in
the
word
stored
at
location
X
are
matched
by
ones
in
the
corresponding
indicator
register
positions,
the
next
instruction
will
be
skipped.
If
all
of
the
ones
are
not
matched,
the
computer
will
take
the
next
instruction
in
sequence.
Positions
of
storage
location
X
which
contain
zeros
are
not
compared.
Execution
of
this
instruction
requires
an
E
cycle
to
obtain
the
test
word
from
storage
and
two
L
cycles
to
complete
the
test.
The
test
is
accomplished
by
moving
the
test
word
to
the
accumulator,
where
it
can
be
complemented.
The
complement
is
OR
'ed
with
the
in-
dicators
and
returned
to
the
SR.
The
result
of
the
OR
will
be
all
ones
if
the
ones
in
the
test
word
match
the
indicator.
To
test
for
all
ones
a
carry
is
added
to
the
OR
which
will
result
in
an
adder
(P)
carry
to
condition
the
advance
instruction
counter.
The
contents
of
the
accumulator
are
saved
and
restored
to
normal
during
execution
of
the
instruction.
116
116
118
Table of Contents
Table of Contents
3
00 Introduction to the Ibm 7090
6
General System Operation
6
Functional Parts of Acomputer System
6
7090 System Make-Up
7
7090 General Logic
10
The Stored Program
11
Exercises
11
Computer Operations
13
Storage Word Designation
13
The 7090 Word
13
Numeric Quantity (Data) Word
13
CPU Instruction Word
13
Data Channel Command Word
15
Fundamental Components
15
A+B = C, Print C
18
Other Components, Instructions and
22
Commands
22
Cpu Internal Functions
24
Functional Components
24
Storage Register (SR)
24
Accumulator Register (AC)
24
Multiplier-Quotient Register (MQ)
24
Index Registers (XR)
24
Program Register (PR)
24
Address Switches (AS)
27
Tag Registers
33
Adders (AD)
33
Instruction Decoding and Processing
37
Operation Decoders
37
Control Circuits
37
Pulses
37
Basic Cycle
37
Ibm 7606 Multiplexor
39
Multiplexor Functional Units
39
Multiplexor Clock
39
Multiplexor Storage Bus
42
Multiplexor Storage Bus Or'ing
44
Multiplexor Address Switches
44
Data Flow and Control
44
CPU to Core Storage
44
Core Storage to CPU
44
Cpu Data Flow and Timing
46
I Cycle
46
Indirect Addressing
46
Instructions
48
Word Transmission Instructions
48
Fixed-Point Arithmetic Instructions
56
Floating-Point Arithmetic Instructions
69
Transfer Instructions
92
Trap Mode Instructions
98
Skip Instructions
100
Control Instructions
108
Sense Indicator Instructions
112
Index Transmission Instructions
120
AND and or Instructions
129
Convert Instructions
133
Floating-Point Trap
142
Ibm 7151 Console Control Unit
145
Operator's Panel
147
Indicators
147
Manual Controls
150
Manual Control Keys
152
Customer Engineer's Test Panel
159
Indicators
159
Switches
163
Marginal Check Panel
166
Reference Information
167
Condensed Logic
167
Adders
167
Address Register
167
Program Register
167
Sense Indicators
167
Sh Ift C Ounte R
169
Program Counter
169
Accumulator
169
Multiplier Quotient
169
Index Registers
171
Storage Register
171
Service Aids
171
One Card Programs
171
Voltage
175
Adjustment of C Pulse Set
175
Operator's Panel
177
Console Indicators
177
Indicator Lights
178
Unitized Assembly Lights & Keys
179
Switches and Keys
179
Plastic Rocker
179
Reset Motor
179
CE Panel
180
Indicator Lights
180
Switches and Receptacles
180
Marginal Check Panel
181
MC Switches
181
MC Meters
181
Tailgate
182
Signal Connectors
182
Power Connector S
182
5
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IBM 7090 Specifications
General
Category
Mainframe Computer
Introduced
1959
Transistor-based
Yes
Word Length
36 bits
Add Time
4.8 microseconds
Memory
Core memory
Memory (words)
32, 768 words