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Industrial PC
7090
IBM 7090 User Manual
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Load
Index
from
Decrement
LXD
-0534
(I,
E)
Figure
5.3-66
This
instruction
loads
the
specified
index
register
with
the
contents
of
the
decrement
field
(3-17)
of
storage
location
X
in
true
form.
Execution
of
LXD
is
identical
to
that
of
LDC,
except
that
the
complementing
operation
is
not
used.
5.3.
11
AND
and
OR
Instructions
The
AND
and
OR
instructions
are
used
to
produce
logical
combinations
of
bits.
These
are
useful
for
masking
or
matching
words.
OR
to
Storage
ORS
-0602
(I,
E)
Figure
5.3-67
This
instruction
stores
the
logical
OR
of
the
word
stored
at
location
X
and
the
AC
(P,I-35)
in
location
X.
The
logical
OR
is
obtained
by
matching
the
two
words
and
stor-
ing
ones
in
all
positions
which
have
ones
in
either
word.
For
this
instruction,
the
OR
is
developed
in
the
memory
data
register
during
the
E
cycle.
The
words
from
core
stor-
age
and
the
SB
both
go
the
memory
data
register
and
the
result
in
the
memory
data
regis-
ter
is
put
back
into
core
storage.
OR
to
Accumulator
ORA
-0501
(I,
E)
Figure
5.
3-68
This
instruction
places
the
logical
OR
of
the
word
stored
at
locationX
andAC(P-35)
in
the
accumulator.
The
OR
is
produced
by
matching
the
two
words
and
placing
ones
in
all
positions
of
the
AC
which
have
ones
in
either
word.
The
OR
is
developed
in
the
SR
by
gating
both
the
storage
and
AC
words
into
the
SR
at
the
same
time.
Sand
Q
remain
unchanged.
AND
to
Accumulator
ANA
-0320
(I,
E,
L)
Figure
5.3-69
This
instruction
places
the
logical
AND
of
the
word
stored
at
location
X
and
the
AC
(P,
1-35)
in
the
accumulator
(P,I-35).
The
logical
AND
is
obtained
by
matching
the
two
words
and
placing
ones
in
all
positions
of
the
accumulator
which
have
corresponding
ones
in
both
the
AC
and
storage.
This
instruction
is
executed
by
OR'ing
the
complement
of
both
words
and
then
complementing
this
sum.
AND
to
Storage
ANS
+0320
(I,
E,
L,
E)
Figure
5.3-69
This
instruction
stores
the
logical
AND
of
the
word
stored
at
location
X
and
the
contents
of
the
AC
(P,
1-35)
in
location
X.
The
logical
AND
is
obtained
by
matching
the
two
words
and
placing
ones
in
all
positions
of
storage
location
X
which
have
corre-
sponding
ones
in
both
the
AC
and
storage.
The
contents
of
the
AC(S,
Q,
P,
1-35)
are
un-
changed.
The
AND
is
accomplished
the
same
for
this
instruction
as
for
ANA.
An
addi-
tionalE
cycle
is
requiredto
put
the
AND
in
storage.
The
complement
of
the
original
AC
(P,
1-35)
is
returned
to
the
AC
and
re-complemented
to
trestore
the
contents
of
AC
(P,
1-35).
During
the
execution,
the
original
AC(Q)
is
saved
in
SR(Q)
and
then
returned
to
AC(Q).
Exclusive
OR
to
Accumulator
ERA
+0322
(I,
E,
L)
Figu:r:e
5.3-70
This
instruction
matches
AC(P,
1-35)
with
the
logical
word
stored
at
location
X.
Zeros
replace
all
positions
of
the
AC
which
match
the
corresponding
positions
of
the
logical
word.
Accumulator
positions
(S)
and
(Q)
are
cleared.
128
128
130
Table of Contents
Table of Contents
3
00 Introduction to the Ibm 7090
6
General System Operation
6
Functional Parts of Acomputer System
6
7090 System Make-Up
7
7090 General Logic
10
The Stored Program
11
Exercises
11
Computer Operations
13
Storage Word Designation
13
The 7090 Word
13
Numeric Quantity (Data) Word
13
CPU Instruction Word
13
Data Channel Command Word
15
Fundamental Components
15
A+B = C, Print C
18
Other Components, Instructions and
22
Commands
22
Cpu Internal Functions
24
Functional Components
24
Storage Register (SR)
24
Accumulator Register (AC)
24
Multiplier-Quotient Register (MQ)
24
Index Registers (XR)
24
Program Register (PR)
24
Address Switches (AS)
27
Tag Registers
33
Adders (AD)
33
Instruction Decoding and Processing
37
Operation Decoders
37
Control Circuits
37
Pulses
37
Basic Cycle
37
Ibm 7606 Multiplexor
39
Multiplexor Functional Units
39
Multiplexor Clock
39
Multiplexor Storage Bus
42
Multiplexor Storage Bus Or'ing
44
Multiplexor Address Switches
44
Data Flow and Control
44
CPU to Core Storage
44
Core Storage to CPU
44
Cpu Data Flow and Timing
46
I Cycle
46
Indirect Addressing
46
Instructions
48
Word Transmission Instructions
48
Fixed-Point Arithmetic Instructions
56
Floating-Point Arithmetic Instructions
69
Transfer Instructions
92
Trap Mode Instructions
98
Skip Instructions
100
Control Instructions
108
Sense Indicator Instructions
112
Index Transmission Instructions
120
AND and or Instructions
129
Convert Instructions
133
Floating-Point Trap
142
Ibm 7151 Console Control Unit
145
Operator's Panel
147
Indicators
147
Manual Controls
150
Manual Control Keys
152
Customer Engineer's Test Panel
159
Indicators
159
Switches
163
Marginal Check Panel
166
Reference Information
167
Condensed Logic
167
Adders
167
Address Register
167
Program Register
167
Sense Indicators
167
Sh Ift C Ounte R
169
Program Counter
169
Accumulator
169
Multiplier Quotient
169
Index Registers
171
Storage Register
171
Service Aids
171
One Card Programs
171
Voltage
175
Adjustment of C Pulse Set
175
Operator's Panel
177
Console Indicators
177
Indicator Lights
178
Unitized Assembly Lights & Keys
179
Switches and Keys
179
Plastic Rocker
179
Reset Motor
179
CE Panel
180
Indicator Lights
180
Switches and Receptacles
180
Marginal Check Panel
181
MC Switches
181
MC Meters
181
Tailgate
182
Signal Connectors
182
Power Connector S
182
5
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IBM 7090 Specifications
General
Category
Mainframe Computer
Introduced
1959
Transistor-based
Yes
Word Length
36 bits
Add Time
4.8 microseconds
Memory
Core memory
Memory (words)
32, 768 words