IBM 7090 User Manual

index register or combination of index registers may be selected. The tag bits are,
retained by the tag register on Systems 2. OS. 01. 1. SB(lS-20) outputs are used to turn
on the tag register triggers during I time of the instruction. The output of the index
register, when gated to the adders, is always complemented. To make this a 2's
complement, a carry is gated to adder (17) at the same time the XR is gated to the AD.
Many instructions are indexable, as controlled by their tag positions, allowing the
address portion of the instruction to be modified. Appendix A shows which instructions
are index able .
Transfer with Index Incremented
TXI +1000 (I, L)
Figure 5.3-59
This transfer adds its decrement to the specified index register and causes an un-
conditional transfer to location X. The index register outputs are always complemented
to the adders. Thus, to add the decrement, the index register must be cycled through
the adders so they contain a complement before the addition.
Transfer on Index
TIX +2000 (I, L)
Figure 5.3-60
If the number in the specified index register is greater than the decrement, the
contents of the index register will be reduced by the amount of the decrement, and an
instruction transfer will be taken to storage location X. When the number in the index
register is equal to or less than the decrement, no reduction is made and the computer
takes the next instruction in sequence. The comparison between the index register
contents and the decrement is made by gating the decrement and the 2' s complement
of the index register contents to the adders. No carry from adder (3) indicates that
the index register contents are greater and that the transfer and index regi ster reduc-
tion are to be made. A carry from adder (3) will, therefore, block the transfer and
index register reduction.
Transfer on No Index
TNX -2000 (I, L)
Figure 5.3-60
If the number in the specified index register is greater than the decrement, the
contents of the index register. will be reduced by the amount of the decrement, and the
computer will proceed to the next instruction in sequence. When the number in the
index register is equal to or less than the decrement, no reduction is made, but an
instruction transfer will be taken to storage location X.
The sequence of operations for this instruction is like that of TIX, except that the
conditional transfer circuits are activated with the adder (3) carry·trigger on.
Transfer on Index High
TXH +3000 (I, L)
Figure 5.3-60
If the number in the specified index register is greater than the decrement, an
instruction transfer is taken to storage location X. If the number in the index register
is less than or equal to the decrement, the computer takes the next instruction in
sequence. Execution of this instruction is identical to that of TIX. Because no reduc-
tion is to be made, the adders are not routed to the index registers.
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IBM 7090 Specifications

General

Category	Mainframe Computer
Introduced	1959
Transistor-based	Yes
Word Length	36 bits
Add Time	4.8 microseconds
Memory	Core memory
Memory (words)	32, 768 words