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Industrial PC
7090
IBM 7090 User Manual
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Place
Index
in
Decrement
PXD
-0754
(I)
Figure
5.3-63
This
instruction
places
the
true
contents
of
the
specified
index
register
in
positions
(3-17)
of
the
AC.
The
remainder
of
the
AC
is
cleared.
Execution
of
this
instruction
is
similar
to
PXA.
However,
because
no
shift
is
required,
the
index
register
contents
can
be
routed
directly
from
the
adders
to
the
AC.
Store
Index
in
Address
SXA
+0634
(I,
E)
Figure
5.3-64
This
instruction
stores
the
true
contents
of
the
specified
index
register
in
the
address
field
(21-35)
of
storage
location
X.
The
remaining
positions
of
location
X
are
unchanged.
The
logic
of
the
execution
of
this
instruction
is
similar
to
PXA.
However,
an
E
cycle
is
needed
to
put
the
information
in
core
storage.
Store
Index
in
Decrement
SXD
-0634
(I,
E)
Figure
5.3-64
This
instruction
stores
the
true
contents
of
the
specified
index
register
in
the
decrement
(3-17)
of
storage
location
X.
The
remaining
positions
of
location
X
are
unchanged.
Execution
of
this
instruction
is
similar
to
SXA
but,
because
there
is
no
shift
required,
the
output
of
the
adders
goes
directly
to
the
SR.
Address
to
Index
True
AXT
+0774
(I)
Figure
5.3-65
This
instruction
loads
the
specified
index
register
with
the
address
field
(21-35)
in
true
form.
Address
to
Index
Complemented
AXC
-0774
(I)
Figure
5.3-65
This
instruction
loads
the
specified
index
register
with
the
2's
complement
of
the
address
portion
(21-35)
of
the
instruction.
Execution
ofAXC
is
similar
to
that
of
AXT
except
that
the
index
register
contents
must
be
cycled
through
the
adders
during
the
following
I
cycle
to
obtain
the
2's
complement.
Load
Complement
of
Address
in
Index
LAC
+0535
(I,
E)
Figure
5.3-66
This
instruction
loads
the
2's
complement
of
the
address
(21-35)
of
storage
location
X
into
the
specified
index
register.
Execution
of
this
instruction
requires
an
E
cycle
to
obtain
the
word
from
storage.
The
address
portion
is
transferred
to
the
index
regis-
ter
by
way
of
the
adders
at
the
end
of
the
cycle,and,
to
obtain
the
2's
complement,
the
index
register
is
cycled
during
the
following
I
cycle.
Load
Complement
of
Decrement
in
Index
LDC
-0535
(I,
E)
Figure
5.3-66
This
instruction
loads
the
2's
complement
of
the
decrement
field
(3-17)
of
storage
location
X
into
the
specified
index
register.
Execution
of
this
instruction
is
identical
to
that
of
LAC
except
that
the
SR
decrement,
instead
of
the
address,
goes
to
the
adders.
Load
Index
from
Address
LXA
+0534
(1,
E)
Figure
5.3-66
This
instruction
loads
the
specified
index
register
with
the
contents
of
the
address
field
(21-35)
of
storage
location
X
in
true
form.
Execution
of
this
instruction
is
identical
to
that
of
LAC,
except
that
the
complementing
operation
is
not
required.
126
126
128
Table of Contents
Table of Contents
3
00 Introduction to the Ibm 7090
6
General System Operation
6
Functional Parts of Acomputer System
6
7090 System Make-Up
7
7090 General Logic
10
The Stored Program
11
Exercises
11
Computer Operations
13
Storage Word Designation
13
The 7090 Word
13
Numeric Quantity (Data) Word
13
CPU Instruction Word
13
Data Channel Command Word
15
Fundamental Components
15
A+B = C, Print C
18
Other Components, Instructions and
22
Commands
22
Cpu Internal Functions
24
Functional Components
24
Storage Register (SR)
24
Accumulator Register (AC)
24
Multiplier-Quotient Register (MQ)
24
Index Registers (XR)
24
Program Register (PR)
24
Address Switches (AS)
27
Tag Registers
33
Adders (AD)
33
Instruction Decoding and Processing
37
Operation Decoders
37
Control Circuits
37
Pulses
37
Basic Cycle
37
Ibm 7606 Multiplexor
39
Multiplexor Functional Units
39
Multiplexor Clock
39
Multiplexor Storage Bus
42
Multiplexor Storage Bus Or'ing
44
Multiplexor Address Switches
44
Data Flow and Control
44
CPU to Core Storage
44
Core Storage to CPU
44
Cpu Data Flow and Timing
46
I Cycle
46
Indirect Addressing
46
Instructions
48
Word Transmission Instructions
48
Fixed-Point Arithmetic Instructions
56
Floating-Point Arithmetic Instructions
69
Transfer Instructions
92
Trap Mode Instructions
98
Skip Instructions
100
Control Instructions
108
Sense Indicator Instructions
112
Index Transmission Instructions
120
AND and or Instructions
129
Convert Instructions
133
Floating-Point Trap
142
Ibm 7151 Console Control Unit
145
Operator's Panel
147
Indicators
147
Manual Controls
150
Manual Control Keys
152
Customer Engineer's Test Panel
159
Indicators
159
Switches
163
Marginal Check Panel
166
Reference Information
167
Condensed Logic
167
Adders
167
Address Register
167
Program Register
167
Sense Indicators
167
Sh Ift C Ounte R
169
Program Counter
169
Accumulator
169
Multiplier Quotient
169
Index Registers
171
Storage Register
171
Service Aids
171
One Card Programs
171
Voltage
175
Adjustment of C Pulse Set
175
Operator's Panel
177
Console Indicators
177
Indicator Lights
178
Unitized Assembly Lights & Keys
179
Switches and Keys
179
Plastic Rocker
179
Reset Motor
179
CE Panel
180
Indicator Lights
180
Switches and Receptacles
180
Marginal Check Panel
181
MC Switches
181
MC Meters
181
Tailgate
182
Signal Connectors
182
Power Connector S
182
5
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IBM 7090 Specifications
General
Category
Mainframe Computer
Introduced
1959
Transistor-based
Yes
Word Length
36 bits
Add Time
4.8 microseconds
Memory
Core memory
Memory (words)
32, 768 words