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IBM 7090 User Manual

IBM 7090
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Assume
that
the
necessary
instructions
and
commands
are
in
storage
before
the
program
starts.
Figure
2.4-1
shows
the
locations
and
binary
bit
configurations
of
the
words
in
storage
when
the
program
begins.
The
following
discussion
follows
these
words
sequentially
as
the
program
progresses
to
completion.
Before
starting
the
program,
the
card
with
A
and
B
punched
in
it
is
placed
in
the
card
reader
and
the
card
reader
start
key
is
depressed.
This
action
causes
the
card
to
feed
down
to
the
reading
brushes
and
the
reader
to
go
into
ready
status.
It
is
now
pos-
sible
for
the
CPU
to
direct
a
data
channel
(let
us
say
channel
A)
to
run
the
card
reader
and
read
the
card.
The
operation
of
the
CPU
starts
with
the
depression
of
the
start
key
on
the
CPU
console.
First,
the
CPU
must
have
an
instruction
for
the
very
first
operation.
Storage
must
have
an
address
for
this
instruction
word
to
locate
it
for
the
CPU.
The
program
counter
(PC),
initially
zeros,
contains
this
address,
which
goes
to
the
address
register
(AR)
and
then
to
the
memory
address
register
(MAR).
The
word
in
storage
is
now
lo-
cated
by
its
address
(00000),
set
into
the
memory
data
register
(MDR) ,
and
sent
to
the
storage
register
(SR).
At
the
same
time
that
this
first
instruction
goes
to
the
SR,
the
operation
code
goes
to
the
program
register
(PR).
Because
positions
1
and
2 of
the
word
contain
no
bits,
S(sign)
and
3
through
11
constitute
the
operation
code,
going
to
S
and
1
through
9 of
the
PRo
The
function
of
the
PC
for
the
first
instruction
is
finished
when
the
PR
receives
the
operation
code.
It
then
advances
one
to
00001
in
preparation
for
calling
in
the
next
instruction
when
the
first
has
completed
its
operation.
The
function
of
the
first
instruction
is
to
select
the
card
reader
on
channel
A.
De-
coding
PR
(S-9)
indicates
only
a
read
select,
so
CPU
looks
to
the
SR (23-35)
for
a
channel
and
unit
selection.
Here,
the
reader
on
channel
A
is
indicated.
Channel
A
acknowledges
the
selection
of
its
reader
if
the
reader
is
ready
to
run,
and
the
CPU
is
free
to
go on
to
another
instruction.
The
program
counter
(PC) now
reads
00001,
so
that
when
the
CPU
requests
a
word
from
storage,
the
second
instruction
comes
to
the
SR
and
PRo
This
occurs
in
the
same
manner
described
for
the
first
instruction,
and
the
PC
advances
to
00002.
Decoding
the
new
bit
configuration
in
PR
(S-9)
at
this
time
indicates
that
the
channel
registers
are
to
be
reset
and
a
command
is
to
be
received.
The
CPU
has
the
address
of
the
command
in
SR
(21-35),
so
this
address
goes
through
adders
3-17
to
the
AR
and
MAR.
At
the
same
time,
PR
decoding
in
the
CPU
causes
the
word
at
this
address,
00012
(Figure
2.4-1),
to
go
to
channel
A
rather
than
to
the
CPU.
Channel
A
receives
the
operation
code
of
the
word
(S,
1,
2)
in
its
operation
register,
the
word
count
(3-17)
in
its
word
counter
(WC),
and
the
first
storage
address
(21-35)
in
its
channel
address
counter
(CAC).
At
this
point
in
the
program,
all
operations
have
occurred
at
electronic
speed
within
a few
microseconds.
Channel
A
has
its
reader
selected
for
a
reading
operation,
a
disconnect-type
operation
code,
a
word
count
of
two,
and
a
beginning
address
where
the
first
of
the
two
words
is
to
be
stored.
The
reader
feeds
and
reads
the
card,
and
channel
A
stores
the
first
word
at
00014
according
to
the
CAC.
The
WC
decreases
to
1
and
the
18

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IBM 7090 Specifications

General IconGeneral
CategoryMainframe Computer
Introduced1959
Transistor-basedYes
Word Length36 bits
Add Time4.8 microseconds
MemoryCore memory
Memory (words)32, 768 words