EasyManuals Logo

IBM 7090 User Manual

IBM 7090
190 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #21 background imageLoading...
Page #21 background image
CAC
steps
to
00015
when
the
first
word,
factor
A,
has
been
sent
to
storage.
When
the
second
word,
factor
B,
is
read,
the
data
channel
sends
it
to
storage
location
00015
as
indicated
by
the
CAC.
The
word
count
now
goes
to
zero
as
the
WC
is
reduced
again.
With a
disconnect
operation
code,
the
work
of
the
data
channel
is
done
and
the
CPU
is
notified
of
this.
What
has
CPU
been
doing
during
the
relatively
long
period
of
mechanical
operation
of
the
card
reader?
It
cannot
be
allowed
to
go
on
until
factors
A
and
B
have
been
read
in
and
stored.
When
channel
A
acknowledged
receipt
of
its
command,
the
CPU
sent
to
storage
for
the
word
at
00002.
The
PC
to
AR
to
MAR
caused
the
word
at
00002
to
come
from
stor-
age
to
SR
and
PRo
Decoding
the
bits
in
PR
sent
the
CPU
to
the
address
in
SR (21-35)
for
a
new
instruction
and
indicated
that
nothing
more
was
to
be
done
except
that
this
address
was
also
to
be
put
in
the
PC.
This
operation
was
indicated
to
be
conditional,
however,
and
was
to
be
done
only
if
channel
A
was
in
operation.
Channel
A
was
in
oper-
ation,
so
the
following
events
occurred
while
channel
A
read
in
factors
A
and
B
and
stored
them.
1.
PC
advanced
to
00003.
2. SR (21-35),
through
adders
3-17,
went
to
AR
and
then
to
MAR,
each
time
being
00002.
3.
AR
contents
of 00002
replaced
PC
contents
of
00003.
4.
storage
sent
back
the
same
word
originally
called
for
as
the
third
instruction.
5.
The
same
operation
code
was
decoded
and
the
entire
operation
repeated,
so
long
as
channel
A
remained
in
operation.
Eventually,
channel
A
completes
reading
in
and
storing
factors
A
and
B.
This
time,
the
CPU
does
not
send
for
00002
again,
but
allows
the
PC
to
retain
00003
and
sends
this
to
AR
and
MAR. Now
the
word
at
00003
comes
to
SR
and
PRo
Decoding
PR
causes
the
accumulator
to
be
cleared.
The
address
field,
SR
(21-35),
of
the
instruction
goes
through
adders
3-17
to
AR
and
then
to
MAR.
This
time,
the
CPU
is
not
finished
with
its
operation
and
is
not
looking
for
a
new
instruction.
Instead,
factor
A
comes
from
storage
location
00014
to
the
SR. No
portion
of
this
word
enters
the
PR
and
the
clear
and
add
operation
code
is
retained
there.
Factor
A
goes
from
the
SR
through
the
adders
to
the
accumulator
(AC).
There
is
no
offsetting
of
the
address
field
this
time,
because
the
SR
contains
a
data
word
rather
than
an
instruction
word.
With
the
placement
of
factor
A
in
the
accumulator,
the
clear
and
add
operation
is
complete,
so
the
CPU
sends
to
storage
for
a
new
instruction.
The
PC
has
advanced
to
00004,
and
this
address
through
AR
and
MAR
causes
storage
to
send
the
contents
of
00004
to
SR
and
PRo
Decoding
the
new
operation
code
in
the
PR,
the
CPU
sends
SR
(21-35)
through
adders
3-17
to
the
AR
and
MAR.
This
address
of 00015
is
the
address
of
factor
B,
which
is
to
be
added
to
the
contents
of
the
AC.
The
PC
advances
to
00005.
Storage
sends
factor
B
to
the
SR
in
the
same
manner
that
it
sent
factor
A
previously.
Here,
again,
the
CPU
has
not
yet
completed
its
operation,
and
the
word
is
treated
as
a
data
word.
From
the
SR,
factor
B
goes
to
the
adders.
At
the
same
time,
factor
A
goes
to
the
adders
from
the
AC,
due
to
the
operation
code
in
the
PRo
The
sum
of
factors
A
and
B
out
of
the
adders
goes
to
the
AC,
replacing
factor
A
there.
The
CPU
has
now
completed
the
add
instruction,
using
the
address
of
factor
B.
20

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the IBM 7090 and is the answer not in the manual?

IBM 7090 Specifications

General IconGeneral
CategoryMainframe Computer
Introduced1959
Transistor-basedYes
Word Length36 bits
Add Time4.8 microseconds
MemoryCore memory
Memory (words)32, 768 words